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ADPD144RI Datasheet(PDF) 28 Page - Analog Devices

Part # ADPD144RI
Description  PPG Optical Sensor Module with Integrated Red/IR Emitters and AFE
PDF  34 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADPD144RI Datasheet(HTML) 28 Page - Analog Devices

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ADPD144RI
Data Sheet
Rev. A | Page 28 of 34
AFE CONFIGURATION REGISTERS
Table 15. AFE Configuration Registers, Time Slot A
Address
Data
Bit
Default
Value
Access
Name
Description
0x39
[15:0]
0x22FC
R/W
SLOTA_AFEMODE
AFE configuration for Time Slot A.
Recommended setting: write 0x21F4.
0x42
[15:7]
0x038
R/W
Reserved
6
0x0
R/W
SLOTA_TIA_IND_EN
Enable Time Slot A TIA gain individual settings. When this bit is enabled,
Channel 1 receives the TIA gain from Register 0x42, Bits[1:0], and
Channel 2 to Channel 4 receive the settings from Register 0x55, Bits[5:0].
0: disable TIA gain individual setting.
1: enable TIA gain individual setting.
[5:4]
0x3
R/W
Reserved
Write 0x03.
[3:2]
0x2
R/W
Reserved
Write 0x1.
[1:0]
0x0
R/W
SLOTA_TIA_GAIN
TIA gain for Time Slot A. When SLOTA_TIA_ IND_EN is enabled, this
value is for Time Slot A Channel 1 TIA gain. When SLOTA_TIA_IND_EN is
disabled, it is for all four Time Slot A channel TIA gain settings.
0: 200 kΩ.
1: 100 kΩ.
2: 50 kΩ.
3: 25 kΩ.
0x43
[15:0]
0xADA5
R/W
SLOTA_AFE_CON
AFE connection in Time Slot A.
0xADA5: analog full path mode.
0xB065: TIA ADC mode.
Others: reserved.
0x55
[15:12]
0x0
R/W
Reserved
[11:10]
0x0
R/W
SLOTB_TIA_GAIN_4
TIA gain for Time Slot B Channel 4.
0: 200 kΩ.
1: 100 kΩ.
2: 50 kΩ.
3: 25 kΩ.
[9:8]
0x0
R/W
SLOTB_TIA_GAIN_3
TIA gain for Time Slot B Channel 3.
0: 200 kΩ.
1: 100 kΩ.
2: 50 kΩ.
3: 25 kΩ.
[7:6]
0x0
R/W
SLOTB_TIA_GAIN_2
TIA gain for Time Slot B Channel 2.
0: 200 kΩ.
1: 100 kΩ.
2: 50 kΩ.
3: 25 kΩ.
[5:4]
0x0
R/W
SLOTA_TIA_GAIN_4
TIA gain for Time Slot A Channel 4.
0: 200 kΩ.
1: 100 kΩ.
2: 50 kΩ.
3: 25 kΩ.
[3:2]
0x0
R/W
SLOTA_TIA_GAIN_3
TIA gain for Time Slot A Channel 3.
0: 200 kΩ.
1: 100 kΩ.
2: 50 kΩ.
3: 25 kΩ.



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