ADPD144RI datasheet(32/34 Pages) AD

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ADPD144RI

Data Sheet

Rev. A | Page 32 of 34

Address

Data

Bit

Default

Access

Name

Description

0x4F

[15:3]

0x0412

R/W

Reserved

Write 0x0412.

0x0

R/W

EXT_SYNC_SEL

Sample sync select.

0: use the internal 32 kHz clock with FSAMPLE to select sample timings.

1: use the INT pin to trigger the sample cycle.

0x0

R/W

INT_IE

INT pin input enable.

0x0

R/W

Reserved

Write 0x0.

0x50

[15:6]

0x000

R/W

Reserved

0x0

R/W

CLK32M_CAL_EN

As part of the 32 MHz clock calibration routine, write 1 to begin the

clock ratio calculation. Read the result of this calculation from the

CLK_RATIO bits in Register 0x0A.

Reset this bit to 0 prior to reinitiating the calculation.

[4:0]

0x0

R/W

Reserved

ADC REGISTERS

Table 18. ADC Registers

Address

Data

Bits

Default

Access

Name

Description

0x12

[15:0]

0x0028

R/W

FSAMPLE

Sampling frequency: fSAMPLE = 32 kHz/(Register 0x12, Bits[15:0] × 4).

For example, 100 Hz = 0x0050, 200 Hz = 0x0028.

0x15

[15:11]

0x0

R/W

Reserved

[10:8]

0x6

R/W

SLOTB_NUM_AVG

Sample sum/average for Time Slot B. Specifies the averaging factor, NB,

which is the number of consecutive samples that is summed and averaged

after the ADC. Register 0x70 to Register 0x7F hold the data sum.

data average, which can increase SNR without clipping, in 16-bit registers.

The data rate is decimated by the value of the SLOTB_NUMB_AVG bits.

0: 1.

1: 2.

2: 4.

3: 8.

4: 16.

5: 32.

6: 64.

7: 128.

0x0

R/W

Reserved

[6:4]

0x0

R/W

SLOTA_NUM_AVG

Sample sum/average for Time Slot A. NA: same as Bits[10:8] but for

Time Slot A. See description in Register 0x15, Bits[10:8].

[3:0]

0x0

R/W

Reserved

0x18

[15:0]

0x2000

R/W

SLOTA_CH1_OFFSET

Time Slot A Channel 1 ADC offset. The value to subtract from the raw

ADC value. A value of 0x2000 is typical.

0x19

[15:0]

0x2000

R/W

SLOTA_CH2_OFFSET

Time Slot A Channel 2 ADC offset. The value to subtract from the raw

ADC value. A value of 0x2000 is typical.

0x1A

[15:0]

0x2000

R/W

SLOTA_CH3_OFFSET

Time Slot A Channel 3 ADC offset. The value to subtract from the raw

ADC value. A value of 0x2000 is typical.

0x1B

[15:0]

0x2000

R/W

SLOTA_CH4_OFFSET

Time Slot A Channel 4 ADC offset. The value to subtract from the raw

ADC value. A value of 0x2000 is typical.

0x1E

[15:0]

0x2000

R/W

SLOTB_CH1_OFFSET

Time Slot B Channel 1 ADC offset. The value to subtract from the raw

ADC value. A value of 0x2000 is typical.

0x1F

[15:0]

0x2000

R/W

SLOTB_CH2_OFFSET

Time Slot B Channel 2 ADC offset. The value to subtract from the raw

ADC value. A value of 0x2000 is typical.

0x20

[15:0]

0x2000

R/W

SLOTB_CH3_OFFSET

Time Slot B Channel 3 ADC offset. The value to subtract from the raw

ADC value. A value of 0x2000 is typical.

0x21

[15:0]

0x2000

R/W

SLOTB_CH4_OFFSET

Time Slot B Channel 4 ADC offset. The value to subtract from the raw

ADC value. A value of 0x2000 is typical.

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