ADPD144RI datasheet(6/34 Pages) AD

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ADPD144RI

Data Sheet

Rev. A | Page 6 of 34

ABSOLUTE MAXIMUM RATINGS

Table 5.

Parameter

Rating

VDD1, VDD2 to AGND

−0.3 V to +2.2 V

VDD1, VDD2 to DGND

−0.3 V to +2.2 V

INT to DGND

−0.3 V to +2.2V

LEDX1, LEDX2 to LGND

−0.3 V to +3.6 V

SCL to DGND

−0.3 V to +3.6 V

SDA to DGND

−0.3 V to +3.6 V

VLED to LGND1

−0.3 V to +4.3 V

ESD

Human Body Model (HBM)

3000 V

Charged Device Model (CDM)

1250 V

Machine Model (MM)

100 V

Solder Reflow (Pb-Free)

Peak Temperature

260 (+0/−5)°C

Time at Peak Temperature

<30 sec

Temperature Range

Powered

−40°C to +85°C

Storage

−40°C to +105°C

Junction Temperature

105°C

The absolute maximum voltage allowable between VLED and LGND is the

voltage that causes the LEDX1 pin and the LED2X pin to reach or exceed

their absolute maximum voltage.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Careful attention to

PCB thermal design is required.

θJA is necessary in a packaged IC to predict reliability and is a

measure of the ability of the package to remove heat from the

die. This device is a module with three separate die mounted to

a substrate. Therefore, it is not possible to have one number

describe the θJA of the entire assembly because the two die types

used within this module have different thermal profiles, which

is why a separate θJA is given for each die type in Table 6.

Table 6. Thermal Resistance

Package Type1

Supply Pins

θJA

Unit

CE-12-2

ASIC

VDD1, VDD2

°C/W

LED1, LED2

VLED

156

°C/W

Thermal impedance simulated values are based on JEDEC 2s2p and two

thermal vias. See JEDEC JESD-51.

RECOMMENDED SOLDERING PROFILE

Figure 3 and Table 7 provide details about the recommended

soldering profile.

t25°C TO PEAK

PREHEAT

CRITICAL ZONE

TL TO TP

TIME

RAMP-DOWN

RAMP-UP

TSMIN

TSMAX

Figure 3. Recommended Soldering Profile

Table 7. Recommended Soldering Profile

Profile Feature

Conditions (Pb-Free)

Average Ramp Rate (TL to TP)

2°C/sec maximum

Preheat

Minimum Temperature (TSMIN)

150°C

Maximum Temperature (TSMAX)

200°C

Time, TSMIN to TSMAX (tS)

60 sec to 120 sec

TSMAX to TL Ramp-Up Rate

2°C/sec maximum

Time Maintained Above Liquidous

Temperature

Liquidous Temperature (TL)

217°C

Time (tL)

60 sec to 150 sec

Peak Temperature (TP)

+260°C (+0/−5)°C

Time Within 5°C of Actual Peak

Temperature (tP)

<30 sec

Ramp-Down Rate

3°C/sec maximum

Time from 25°C (t25°C) to Peak

Temperature

8 minutes maximum

ESD CAUTION

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