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LT8551 Datasheet(PDF) 14 Page - Analog Devices |
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LT8551 Datasheet(HTML) 14 Page - Analog Devices |
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14 / 32 page ![]() LT8551 14 Rev 0 For more information www.analog.com OPERATION and the slaves (in Figure 1). Under normal operation, the CLK2 frequency is at the CLK1 frequency times the total distinct phase number (TDPN), as shown in Figure 2. The number shown above the CLK2 pulses in Figure 2 is called the phase angle number (PAN). Figure 1. REG REG • • • 8551 F01 MASTER LT8551 SYNC CLK1 CLK2 RT/MS PRIMARY CONTROLLER SYNC SLAVE LT8551 SYNC CLK1 CLK2 RT/MS SLAVE LT8551 SYNC CLK1 CLK2 RT/MS Clock Configuration in a Multiple LT8551 System The total distinct phase number is programmed through the master LT8551’s PHS1, PHS2 and PHS3 pins, accord- ing to Table 1. There is a delay locked loop in the chip which can force the primary controller’s BG (Bottom Gate) rising edge to align with the pulse whose phase angle number equals the TDPN (in Figure 2). Each expanded channel chooses one pulse from CLK2 in one CLK1 clock cycle. The rising edge of this chosen pulse aligns with the corresponding channel’s bottom gate turn on edge with a very short delay. The master LT8551’s channel 1 to channel 4 always choose the pulses whose phase angle number equals 1 to 4, respectively. Four chan- nels of a slave LT8551 choose pulses with four consecu- tive phase angles. The phase angle number of the slave LT8551’s channel 1 pulse is also programmed through PHS1, PHS2 and PHS3 pins, according to Table 1, and the pulses of the slave LT8551’s channel 2, channel 3 and channel 4 have the next three phase angle number in succession. LT8551. Table 2 shows the PHS1, PHS2 and PHS3 connections for a two LT8551 system with a total of 9 phases, includ- ing the primary controller’s phase, as an example. The primary controller uses the CLK1 signal. The clocks used by the eight expanded channels are shown in Figure 3. When the primary controller skips one or more pulses, the expanded channels also skip the same number of pulse(s). This function is realized by CLK2. As shown in Figure 4, when the primary controller skips one BG pulse, the CLK2 also skips a group of pulses with phase number from 1 to TDPN. Table 1. Table for Programming Total Distinct Phase Number (TDPN) and Phase Angle Number (PAN) PHS3 PHS2 PHS1 TDPN For Master PAN of Slave Channel 1 Pulse GND GND GND NA 1 GND GND REG 2 2 GND GND Floating 3 3 GND REG GND 4 4 GND REG REG 5 5 GND REG Floating 6 6 GND Floating GND 7 7 GND Floating REG 8 8 GND Floating Floating 9 9 REG GND GND 10 10 REG GND REG 11 11 REG GND Floating 12 12 REG REG GND 13 13 REG REG REG 14 14 REG REG Floating 15 15 REG Floating GND 16 16 REG Floating REG 17 17 REG Floating Floating 18 18 Table 2. Design Example for a 9-Phase Application PHS3 PHS2 PHS1 PAN for Channel 1, 2, 3 and 4 Master LT8551 GND Floating Floating 1, 2, 3, 4 Slave LT8551 GND REG REG 5, 6, 7, 8 |
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