LT8551 datasheet(18/32 Pages) AD

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LT8551

Rev 0

For more information www.analog.com

OPERATION

ENOUT Connection

For a master LT8551, this pin is an open-drain logic

output pin. The master LT8551’s ENOUT pin is pulled

to ground when it is not ready for switching. For a slave

LT8551, this pin is an input pin. For both master and slave

LT8551 devices, when the ENOUT pin is lower than 2.1V

(typical), the gate driver’s switching activity is disabled.

When a master LT8551 is not ready for switching, it is

desired to disable the primary controller and the slave

LT8551 devices’ switching activity. Figure 10 is one rec-

ommended configuration.

ENOUT > 2.1V (TYPICAL) AND VCC > 3.55V (TYPICAL)

SHDN > 1.15V (TYPICAL) AND VIN > 3.3V (TYPICAL) AND

TJUNCTION <165°C (TYPICAL) AND

(ENOUT <2.1V (TYPICAL) OR VCC < 3.55V (TYPICAL))

SHDN < 1.15V (TYPICAL) OR

VIN < 3.3V (TYPICAL) OR

TJUNCTION >165°C (TYPICAL)

YES

8551 F09

FAULT

SWITCHER OFF

• SWITCHER OFF

• REG LDO ON

CHIP OFF

• SWITCHER OFF

• REG LDO OFF

FAULT DETECTED

• SWITCHER DISABLED

• FAULT COUNTER +1

• WAITING FOR FAULT CONDITION CLEARED

NORMAL MODE

• NORMAL OPERATION

• RESET FAULT COUNTER

POST FAULT DELAY

• SWITCHER DISABLED

• WAITING FOR ABOUT 800 CLOCK CYCLES

PRE-NORMAL MODE

• NORMAL OPERATION FOR ABOUT 800

CLOCK CYCLES

LATCH OFF MODE

• SWITHER DISABLED

FAULT COUNTER

LESS THAN 15?

Figure 9. Start-Up and Fault Sequence

REG

47pF

CONNECT TO

SYSTEM ENABLE SIGNAL

47k

8551 F10

PRIMARY

CONTROLLER

EN OR

SHND

MASTER

LT8551

ENOUT

SHDN

SLAVE

LT8551

ENOUT

SHDN

Figure 10. Recommended ENOUT Connection

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