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LT8551 Datasheet(PDF) 27 Page - Analog Devices

Part # LT8551
Description  Multiphase Boost Converter Expander
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LT8551 Datasheet(HTML) 27 Page - Analog Devices

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LT8551
27
Rev 0
For more information www.analog.com
APPLICATIONS INFORMATION
• The decoupling capacitors for REG, VCC, VIN and the
current sense, etc. should be placed close to their
pins, use PGND for the REG decoupling capacitor
and SGND for VIN and VCC decoupling capacitors.
To minimize the connection impedance, it’s desired
to connect the decoupling capacitors directly to the
pins without using any via.
• Of all the small signal traces, current sensing traces
are most sensitive to noise. The current sensing
traces should be routed differentially with minimum
spacing to minimize the chance of picking-up noise,
as shown in Figure 20. In addition, the filter resistors
and capacitors for current sensing traces should be
placed as close to the ISPx/ISNx pins as possible. If
the DCR sensing is used with an R/C network, the
DCR sensing resistor R1 should be close to the induc-
tor, while R2 and C should be close to the IC. Place
the vias that connect the ISPx/ISNx lines directly at
the terminals of the current sensing resistors or the
inductors as shown in Figure 20.
• When routing the interface signals between a mas-
ter LT8551, primary controller, and/or slave LT8551,
keep the small-signal lines far from the noisy lines
and shield these lines with a ground plane. A recom-
mended line arrangement is shown in Figure 21.
Figure 20. Current Sensing PCB Design
Figure 21. Recommended Signal Lines Arrangement for PCB
8551 F20
VIN
L
a) Resistor Sensing
b) Inductor DCR Sensing
ISNx
ISPx
LT8551
C
DIRECT TRACE CONNECTION
DO NOT USE VIA
THIS VIA SHOULD NOT
TOUCH ANY OTHER
INTERNAL VOUT
COPPER PLANE
DIFFERENTIAL TRACE
VIN
L
ISNx
ISPx
LT8551
R2
R1
C
DIRECT TRACE CONNECTION
DO NOT USE VIA
THIS VIA SHOULD NOT
TOUCH ANY OTHER
INTERNAL VOUT
COPPER PLANE
DIFFERENTIAL TRACE
SW
R
ALL LINES ARE SHIELDED
BY THE GROUND PLANE
ROUTE IN DIFFERENTIAL PAIR
ROUTE IN DIFFERENTIAL PAIR
ALL LINES ARE SHIELDED
BY THE GROUND PLANE
GROUND PLANE
GROUND PLANE
BST
TG
SW
BG
SYNC
SENSE+
SENSE–
INTVCC
RUN/ENABLE
PRIMARY
CONTROLLER
TGSR
TGSH
TGSL
BGSH
CLK1
ISP
ISN
REGSNS
ENOUT
MASTER
LT8551
TGBUF
BGBUF
CLK2
CLK1
MODE
IAMPP
IAMPN
REGSNS
ENOUT
MASTER
LT8551
TGSH
BGSH
CLK2
SYNC
MODE
IAMPP
IAMPN
REGSNS
ENOUT
SLAVE
LT8551
8551 F21



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