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C161 Datasheet(PDF) 69 Page - Infineon Technologies AG |
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C161 Datasheet(HTML) 69 Page - Infineon Technologies AG |
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69 / 400 page  &3, 7KH &HQWUDO 3URFHVVLQJ 8QLW &38 User’s Manual 4-21 1999-08 The Instruction Pointer IP This register determines the 16-bit intra-segment address of the currently fetched instruction within the code segment selected by the CSP register. The IP register is not mapped into the C161PI’s address space, and thus it is not directly accessable by the programmer. The IP can, however, be modified indirectly via the stack by means of a return instruction. The IP register is implicitly updated by the CPU for branch instructions and after instruction fetch operations. The Code Segment Pointer CSP This non-bit addressable register selects the code segment being used at run-time to access instructions. The lower 8 bits of register CSP select one of up to 256 segments of 64 KBytes each, while the upper 8 bits are reserved for future use. IP Instruction Pointer - - - (- - - -/- -) Reset value: 0000 H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ip (r)(w)h Bit Function ip Specifies the intra segment offset, from where the current instruction is to be fetched. IP refers to the current segment <SEGNR>. CSP Code Segment Pointer SFR (FE08 H/04H) Reset value: 0000 H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 - --- -- -- SEGNR - - - - - - - - rh Bit Function SEGNR Segment Number Specifies the code segment, from where the current instruction is to be fetched. SEGNR is ignored, when segmentation is disabled. |
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