NCP5331 datasheet(17/38 Pages) ONSEMI

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NCP5331

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Figure 17. Inductive Sensing Waveform During a

Load Step with Fast RC Time Constant (50

µs/div)

Figure 18. Hiccup Mode Operation

Figure 19. Overcurrent Timer Operation

The waveforms in Figure 17 show a simulation of the

current sense signal and the actual inductor current during

a positive step in load current with values of L = 500 nH,

RL = 1.6 mΩ, RSx = 20 k and CSx = 0.01 µF. For ideal current

signal compensation the value of RSx should be 31 k

Ω. Due

to the faster than ideal RC time constant there is an overshoot

of 50% and the overshoot decays with a 200

µs time

constant. With this compensation the ILIM pin threshold

must be set more than 50% above the full load current to

avoid triggering hiccup mode during a large output load

step.

Current Limit, Hiccup Mode and Overcurrent Timer

The individual phase currents are summed and low-pass

filtered to create an average current signal. The average

current is then compared to a user adjustable voltage at the

ILIM pin. If the ILIM voltage is exceeded, the fault latch is set,

switching stops, and the COMP pin is discharged until it

decreases to 0.27 V. At this point, the fault latch is reset, the

COMP voltage will begin to rise and a new startup cycle

begins. During startup, the output voltage and load current

will increase until either regulation is achieved or the ILIM

voltage is again exceeded. The converter will continue to

operate in “hiccup mode” until the fault condition is

corrected or the overcurrent timer expires.

When an overcurrent fault occurs the converter will enter

a low duty cycle hiccup mode. During hiccup mode the

converter will not switch from the time a fault is detected

until the soft start capacitor (CC2) has discharged below the

COMP Discharge Threshold and then charged back up

above the Channel Start Up Offset. Figure 18 shows the

NCP5331 operating in hiccup mode with the converter

output shorted to GND. Hiccup mode will continue until the

overcurrent timer terminates operation.

The overcurrent timer sets a limit to how long the

converter will operate in hiccup mode. Placing a capacitor

from the COVC pin to GND sets the length of time - a larger

capacitor sets a longer time. The first hiccup pulse starts the

timer by turning on a current source that charges the

capacitor at the COVC pin. If the voltage at the COVC pin rises

to 3 V before the output voltage exceeds the PGD threshold,

then the overcurrent latch is set, COMP is discharged, and

PGD is latched Low. Once set, the overcurrent latch will

hold the converter in this state until the input voltage, either

VCCL or VCCH, is cycled. Conversely, if the timer starts and

either the output short circuit is removed or the load is

decreased before the overcurrent timer expires, PGD will

transition High after its programmed delay time and the

timer will be reset. The nominal overcurrent time can be

calculated using the following equation.

tOVC + COVC @ (OVCTHRESH * OVCMIN) IOVC

+ COVC @ (3.0 V * 0.25 V) 5.0 mA

+ COVC @ 5.5

105

Figure 19 shows the overcurrent timer terminating hiccup

mode when COVC charges up to 3.0 V.

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