NCP5331 datasheet(24/38 Pages) ONSEMI

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NCP5331

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14. The CSREF sense point should be equidistant

between the output inductors to equalize the PCB

resistance added to the current sense paths. This

will insure acceptable current sharing. Also, route

the CSREF connection away from noisy traces such

as the SWNODEs and GATE traces. If noise from

the SWNODEs or GATE signals capacitively

couples to the CSREF trace the external ramps

will be very noisy and voltage jitter will result.

15. Ideally, the SWNODEs are exactly the same shape

and the current sense points (connections to RS1

and RS2) are made at identical locations to equalize

the PCB resistance added to the current sense paths.

This will help to insure acceptable current sharing.

16. Place the 1

µF ceramic capacitors, CP1 and CP2,

close to the drains of the MOSFETs Q1 and Q2,

respectively.

17. If snubbers are used, they must be placed very

close to their associated MOSFETs and

SWNODE. The connections to the snubber

components should be as short as possible.

Design Procedure

1. Output Capacitor Selection

The output capacitors filter the current from the output

inductor and provide a low impedance for transient load

current changes. Typically, microprocessor applications

will require both bulk (electrolytic, tantalum) and low

impedance, high frequency (ceramic) types of capacitors.

The bulk capacitors provide “hold up” during transient

loading. The low impedance capacitors reduce steady-state

ripple and bypass the bulk capacitance when the output

current

changes

very

quickly.

The

microprocessor

manufacturers usually specify a minimum number of

ceramic capacitors. The designer must determine the

number of bulk capacitors.

Choose the number of bulk output capacitors to meet the

peak transient requirements. The following formula can be

used to provide a starting point for the minimum number of

bulk capacitors (NOUT,MIN).

NOUT,MIN + ESR per capacitor @

DIO,MAX

DVO,MAX

(1)

In reality, both the ESR and ESL of the bulk capacitors

determine the voltage change during a load transient

according to

DVO,MAX + (DIO,MAX Dt) @ ESL ) DIO,MAX @ ESR (2)

Unfortunately, capacitor manufacturers do not specify the

ESL of their components and the inductance added by the

PCB traces is highly dependent on the layout and routing.

Therefore, it is necessary to start a design with slightly more

than the minimum number of bulk capacitors and perform

transient

testing

careful

modeling/simulation

determine the final number of bulk capacitors.

2. Output Inductor Selection

The output inductor may be the most critical component

in the converter because it will directly effect the choice of

other components and dictate both the steady-state and

transient performance of the converter. When selecting an

inductor the designer must consider factors such as dc

current, peak current, output voltage ripple, core material,

magnetic saturation, temperature, physical size, and cost

(usually the primary concern).

In general, the output inductance value should be as low

and physically small as possible to provide the best transient

response and minimum cost. If a large inductance value is

used, the converter will not respond quickly to rapid changes

in the load current. On the other hand, too low an inductance

value will result in very large ripple currents in the power

components (MOSFETs, capacitors, etc) resulting in

increased dissipation and lower converter efficiency. Also,

increased ripple currents will force the designer to use

higher rated MOSFETs, oversize the thermal solution, and

use more, higher rated input and output capacitors - the

converter cost will be adversely effected.

One method of calculating an output inductor value is to

size the inductor to produce a specified maximum ripple

current in the inductor. Lower ripple currents will result in

less core and MOSFET losses and higher converter

efficiency. Equation 3 may be used to calculate the

minimum inductor value to produce a given maximum

ripple current (

α) per phase. The inductor value calculated

by this equation is a minimum because values less than this

will produce more ripple current than desired. Conversely,

higher inductor values will result in less than the maximum

ripple current.

LoMIN +

(VIN * VCORE) @ VCORE

(

a @ IO,MAX @ VIN @ fSW)

(3)

α is the ripple current as a percentage of the maximum

output current per phase (

α = 0.15 for ±15%, α = 0.25 for

±25%, etc). If the minimum inductor value is used, the

inductor current will swing

± α% about its value at the center

(half the dc output current for a two-phase converter).

Therefore, for a two-phase converter, the inductor must be

designed or selected such that it will not saturate with a peak

current of (1 +

α) ⋅ IO,MAX/2.

The maximum inductor value is limited by the transient

response of the converter. If the converter is to have a fast

transient response then the inductor should be made as small

as possible. If the inductor is too large its current will change

too slowly, the output voltage will droop excessively, more

bulk capacitors will be required, and the converter cost will

be increased. For a given inductor value, its interesting to

determine the time required to increase or decrease the

current.

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