DS3172 datasheet(28/232 Pages) DALLAS

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8.2 Detailed Pin Descriptions

Table 8-2. Detailed Pin Descriptions

n=1,2,3,4 (port number); Ipu (input with pullup), Oz (output tri-stateable) (needs an external pullup or pulldown resistor to keep from floating), Oa

(Analog output), Ia (analog input), IO (Bidirectional inout); all unused input pins without pullup should be tied low.

PIN NAME

TYPE

PIN DESCRIPTION

Line IO

TLCLKn

Transmit Line Clock Output

TLCLKn: This signal is available when the transmit line interface pins are enabled

(PORT.CR2.TLEN). This clock is typically used as the clock reference for the TDATn

and TNEG signals, but can also be used as the reference for the TSOFIn, TSERn,

and TSOFOn / TDENn signals.

This output signal can be inverted.

DS3: 44.736 MHz +20 ppm

E3: 34.368 MHz +20 ppm

TPOSn /

TDATn

Transmit Positive AMI / Data Output

TPOSn: When the port line interface is configured for B3ZS, HDB3 or AMI mode and

the transmit line interface pins are enabled (PORT.CR2.TLEN), a high on this pin

indicates that a positive pulse should be transmitted on the line. The signal is updated

on the positive clock edge of the referenced clock pin if the clock pin signal is not

inverted, otherwise it is updated on the falling edge of the clock. The signal is typically

referenced to the TLCLKn line clock output pins, but it can be referenced to the

TCLKOn, TCLKIn, RLCLKn or RCLKOn pins. This output signal can be disabled

when the TX LIU is enabled.

This output signal can be inverted.

TDATn: When the port line interface is configured for UNI mode and the transmit line

interface pins are enabled (PORT.CR2.TLEN), the un-encoded transmit signal is

output on this pin. The signal is updated on the positive clock edge of the referenced

clock pin if the clock pin signal is not inverted, otherwise it is updated on the falling

edge of the clock. The signal is typically referenced to the TLCLK line clock output

pins, but it can be referenced to the TCLKOn, TCLKIn, RLCLKn or RCLKOn pins

This output signal can be inverted.

DS3: 44.736 Mbps +20ppm

E3: 34.368 Mbps +20ppm

TNEGn

Transmit Negative AMI / Line OH Mask

TNEGn: When the port line is configured for B3ZS, HDB3 or AMI mode and the

transmit line interface pins are enabled (PORT.CR2.TLEN), a high on this pin

indicates that a negative pulse should be transmitted on the line. The signal is

updated on the positive clock edge of the referenced clock pin if the clock pin signal is

not inverted, otherwise it is updated on the falling edge of the clock. The signal is

typically referenced to the TLCLKn line clock output pins, but it can be referenced to

the TCLKOn, TCLKIn, RLCLKn or RCLKOn pins.

This output signal can be inverted.

DS3: 44.736 Mbps +20ppm

E3: 34.368 Mbps +20ppm

TXPn

Transmit Positive Analog

TXPn: This pin and the TXNn pin form a differential AMI output which is coupled to

the outbound 75

W coaxial cable through a 2:1 step-down transformer (Figure 1-1).

This output is enabled when the TX LIU is enabled and the output is enabled to be

driven. When it is not enabled, it is in a high impedance state.

DS3: 44.736 Mbps +20ppm

E3: 34.368 Mbps +20ppm

TXNn

Transmit Negative Analog

TXNn: This pin and the TXPn pin form a differential AMI output which is coupled to

the outbound 75

W coaxial cable through a 2:1 step-down transformer (Figure 1-1).

DS3172 Datasheet(PDF) 28 Page - Dallas Semiconductor

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