AD6688 datasheet(52/138 Pages) AD

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AD6688

Data Sheet

Rev. 0 | Page 52 of 138

NCO Multichip Synchronization

In some applications, it is necessary to synchronize all the

NCOs and LMFCs within multiple devices in a system. For

applications needing multiple NCO tuning frequencies in the

system, a designer likely needs to generate a single SYSREF

pulse at all devices simultaneously. For many systems,

generating/receiving a single-shot SYSREF at all devices is

challenging because enabling/disabling the SYSREF is often an

asynchronous event, and not all clock generation chips support

this feature.

For this reason, the AD6688 contains a synchronization

triggering mechanism that allows the following:

•

At system startup, multichip synchronization of all NCOs

and LMFCs.

•

During normal operation, multichip synchronization of all

NCOs after applying new tuning frequencies.

The synchronization triggering mechanism uses a master/slave

arrangement, as shown in Figure 78.

Each device has an internal next synchronization trigger enable

(NSTE) signal that controls whether the next SYSREF causes a

synchronization event. Slave ADC devices must source their

NSTE from an external slave next trigger input (SNTI) pin.

Master devices can either use their external master next trigger

output (MNTO) pin (default setting) or use an external

SNTI pin.

See Register 0x0041 and Register 0x0042 in Table 46 to

configure the FD/GPIO pins for this operation.

MNTO = MASTER NEXT TRIGGER OUTPUT (CMOS)

SNTI = SLAVE NEXT TRIGGER INPUT (CMOS)

1 LINK,

L LANES

1 LINK,

L LANES

1 LINK,

L LANES

ADC DEVICE 1

(SLAVE)

ADC DEVICE 0

(MASTER)

ADC DEVICE 2

(SLAVE)

CLOCK

GENERATION

SYSREF±

DEVICE_CLOCK±

1 LINK,

L LANES

ADC DEVICE 3

(SLAVE)

MNTO

SNTI

Figure 78. System using Master/Slave Synchronization Triggering

NCO Multichip Synchronization at Startup

Figure 79 shows a timing diagram along with the required

sequence of events for NCO multichip synchronization using

triggering and SYSREF at startup. Using this startup sequence

synchronizes all the NCOs and LMFCs in the system at once.

NCO Multichip Synchronization During Normal Operation

See the Setting Up the Multichannel NCO Feature section.

MNTO

SNTI

SYSREF

DEVICE

CLOCK

LMFCS

DON’T CARE

NCOS

NCO

SYNCHRONIZED

LMFC

SYNCHRONIZED

BOARD PROPAGATION

DELAY

LEGEND

MNTO = MASTER NEXT TRIGGER OUTPUT (CMOS)

SNTI = SLAVE NEXT TRIGGER INPUT (CMOS)

NSTE = NEXT SYNCHRONIZATION TRIGGER ENABLE

LMFC = LOCAL MULTIFRAME CLOCK

NCO = NUMERICALLY CONTROLLED OSCILLATOR

NSTE

INPUT DELAY

CONFIGURE MASTER AND SLAVE DEVICES

ENABLE TRIGGER IN MASTER DEVICES

MNTO SET HIGH

SNTI SET HIGH

SYSTEM

SYNCHRONIZATION

ACHIEVED

SYSREF

IGNORED

Figure 79. NCO Multichip Synchronization at Startup (Using Triggering and SYSREF)

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