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SC3200 Datasheet(PDF) 429 Page - Advanced Micro Devices |
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SC3200 Datasheet(HTML) 429 Page - Advanced Micro Devices |
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429 / 447 page ![]() AMD Geode™ SC3200 Processor Data Book 429 Electrical Specifications Revision 5.1 Figure 9-49. AC97 Clocks Diagram Table 9-37. AC97 Clocks Parameters Symbol Parameter Min Typ Max Unit Comments FBIT_CLK BIT_CLK frequency 12.288 MHz tCLK_PD BIT_CLK period 81.4 ns tCLK_J BIT_CLK output jitter 750 ps tCLK_H BIT_CLK high pulse width 32.56 40.7 48.84 ns Note 1 tCLK_L BIT_CLK low pulse width 32.56 40.7 48.84 ns Note 1 FSYNC SYNC frequency 48.0 KHz tSYNC_PD SYNC period 20.8 µs tSYNC_H SYNC high pulse width 1.3 µs tSYNC_L SYNC low pulse width 19.5 µs FAC97_CLK AC97_CLK frequency 24.576 MHz tAC97_CLK_PD AC97_CLK period 40.7 ns tAC97_CLK_D AC97_CLK duty cycle 45 55 % tAC97_CLK_FR AC97_CLK fall/rise time 2 5 ns tAC97_CLK_J AC97_CLK output edge-to- edge jitter 100 ps Measured from edge to edge Note 1. Worst case duty cycle restricted to 40/60. BIT_CLK SYNC tCLK_PD tCLK_H tCLK_L tSYNC_H tSYNC_L tSYNC_PD tAC97_CLK_FR VOHD VOLD tAC97_CLK_PD AC97_CLK |
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