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SC3200 Datasheet(PDF) 47 Page - Advanced Micro Devices

Part # SC3200
Description  AMD GEODE-TM SC3200 PROCESSOR
PDF  447 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

SC3200 Datasheet(HTML) 47 Page - Advanced Micro Devices

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AMD Geode™ SC3200 Processor Data Book
47
Signal Definitions
Revision 5.1
F29
TDI
I
(PU22.5)
INPCI
VIO
---
F30
GTEST
I
(PD22.5)
INT
VIO
---
F31
VPCKIN
I
INT
VIO
---
G1
STOP#
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D15
I/O
(PU22.5)
INPCI,
OPCI
G2
VSS
GND
---
---
---
G3
VIO
PWR
---
---
---
G4
VSS
GND
---
---
---
G28
VSS
GND
---
---
---
G29
VIO
PWR
---
---
---
G30
VSS
GND
---
---
---
G31
VPD7
I
INT
VIO
---
H1
SERR#
I/O
(PU22.5)
INPCI,
ODPCI
VIO
---
H2
PERR#
I/O
(PU22.5)
INPCI,
OPCI
VIO
---
H3
LOCK#
I/O
(PU22.5)
INPCI,
OPCI
VIO
---
H4
C/BE3#
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D11
I/O
(PU22.5)
INPCI,
OPCI
H28
VPD6
I
INT
VIO
---
H29
VPD5
I
INT
VIO
---
H30
VPD4
I
INT
VIO
---
H31
VPD3
I
INT
VIO
---
J1
AD13
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A13
O
OPCI
J2
C/BE1#
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D9
I/O
(PU22.5)
INPCI,
OPCI
J3
AD15
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A15
O
OPCI
J4
PAR
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D12
I/O
(PU22.5)
INPCI,
OPCI
J28
VPD2
I
INT
VIO
---
J29
VPD1
I
INT
VIO
---
J30
VPD0
I
INT
VIO
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration
J31
GPIO39
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 = 0
SERIRQ
I/O
INPCI,
OPCI
PMR[14]4 = 1 and
PMR[22]4 = 1
K1
AD11
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A11
O
OPCI
K2
VIO
PWR
---
---
---
K3
VSS
GND
---
---
---
K4
AD14
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A14
O
OPCI
K28
GPIO38/IRRX2
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 = 0. The
IRRX2 input is con-
nected to the input
path of GPIO38.
There is no logic
required to enable
IRRX2, just a sim-
ple connection.
Hence, when
GPIO38 is the
selected function,
IRRX2 is also
selected.
LPCPD#
O
OPCI
PMR[14]4 = 1 and
PMR[22]4 = 1
K29
VIO
PWR
---
---
---
K30
VSS
GND
---
---
---
K31
GPIO37
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 = 0
LFRAME#
O
OPCI
PMR[14]4 = 1 and
PMR[22]4 = 1
L1
C/BE0#
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D8
I/O
(PU22.5)
INPCI,
OPCI
L2
AD9
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A9
O
OPCI
L3
AD10
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A10
O
OPCI
L4
AD12
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A12
O
OPCI
L28
GPIO36
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 = 0
LDRQ#
I
INPCI
PMR[14]4 = 1 and
PMR[22]4 = 1
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration
Table 3-4.
481-TEPBGA Ball Assignment - Sorted by Ball Number (Continued)



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