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SC3200 Datasheet(PDF) 61 Page - Advanced Micro Devices |
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SC3200 Datasheet(HTML) 61 Page - Advanced Micro Devices |
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61 / 447 page  AMD Geode™ SC3200 Processor Data Book 61 Signal Definitions Revision 5.1 AL15 V31 GPIO16 PMR[0] = 0 and FPCI_MON = 0 PC_BEEP PMR[0] = 1 = 0 and FPCI_MON = 0 F_DEVSEL FPCI_MON = 1 Ball No. GPIO PCI2 Sub-ISA H4 C9 GPIO19 PMR[9] = 0 and PMR[4] = 0 INTC# PMR[9] = 0 and PMR[4] = 1 IOCHRDY PMR[9] = 1 and PMR[4] = 1 Ball No. Parallel Port TFT3 FPCI Monitoring U3 B18 ACK# PMR[23] = 0 and (PMR[27] = 0 and FPCI_MON = 0) TFTDE PMR[23] = 1 and (PMR[27] = 0 and FPCI_MON = 0) FPCI_CLK PMR[23] = 0 and (PMR[27] = 1 or FPCI_MON = 1) AB2 D22 AFD#/DSTRB# TFTD2 INTR_O T1 B17 BUSY/WAIT# TFTD3 F_C/BE1# AA3 D21 ERR# TFTD4 F_C/BE0# Y3 B21 INIT# TFTD5 SMI_O AA1 C21 PD0 TFTD6 F_AD0 Y1 A21 PD1 TFTD7 F_AD1 W3 D20 PD2 TFTD8 F_AD2 W2 C20 PD3 TFTD9 F_AD3 V1 C18 PD4 TFTD10 F_AD4 V2 C19 PD5 TFTD11 F_AD5 V3 A20 PD6 TFTD1 F_AD6 U1 A18 PD7 TFTD13 F_AD7 T3 D17 PE TFTD14 F_C/BE2# T4 C17 SLCT TFTD15 F_C/BE3# W1 B20 SLIN# /ASTRB# TFTD16 F_IRDY AB1 A22 STB#/WRITE# TFTD17 F_FRAME# Ball No. GPIO Sub-ISA TFT3 J4 A10 GPIO17 PMR[23] = 0 and PMR[5] = 0 IOCS0# PMR[23] = 0 and PMR[5] = 1 TFTDCK PMR[23] = 1 H3 A9 GPIO20 PMR[23] = 0 and PMR[7] = 0 DOCCS# PMR[23] = 0 and PMR[7] = 1 TFTD0 PMR[23] = 1 H2 D10 GPIO1 PMR[23] = 0 and PMR[13] = 0 IOCS1# PMR[23] = 0 and PMR[13] = 1 TFTD12 PMR[23] = 1 Ball No. AB1 GPIO Sub-ISA AJ13 N31 AB1C PMR[23] = 0 GPIO20 PMR[23] = 1 and PMR[7] = 0 DOCCS# PMR[23] = 1 and PMR[7] = 1 AL12 N30 AB1D PMR[23] = 0 GPIO1 PMR[23] = 1 and PMR[13] = 0 IOCS1# PMR[23] = 1 and PMR[13] = 1 Ball No. GPIO UART2 IDE2 H30 AJ8 GPIO11 PMR[18] = 0 and PMR[8] = 0 RI2# PMR[18] = 1 and PMR[8] = 0 IRQ15 PMR[18] = 0 and PMR[8] = 1 Ball No. Internal Test Internal Test TFT AL16 V30 GXCLK PMR[23] = 0 and PMR[29] = 0 TEST3 PMR[23] = 0 and PMR[29] = 1 FP_VDD_ON PMR[23] = 1 1. The combination of PMR[21] = 1 and PMR[2] = 0 is undefined and should not be used. 2. The combination of PMR[9] = 1 and PMR[4] = 0 is undefined and should not be used. 3. These TFT outputs are reset to 0 by POR# if the TFT_PRSNT strap is pulled high or PMR[10] = 0. This relates to signals TFTD[17:0], TFTDE, TFTDCK. Table 3-8. Three-Signal/Group Multiplexing (Continued) EBGA TEPBGA Default Alternate1 Alternate2 Signal Configuration Signal Configuration Signal Configuration |
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