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SC3200 Datasheet(PDF) 48 Page - Advanced Micro Devices

Part # SC3200
Description  AMD GEODE-TM SC3200 PROCESSOR
PDF  447 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

SC3200 Datasheet(HTML) 48 Page - Advanced Micro Devices

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48
AMD Geode™ SC3200 Processor Data Book
Signal Definitions
Revision 5.1
L29
GPIO35
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 = 0
LAD3
I/O
(PU22.5)
INPCI,
OPCI
PMR[14]4 = 1 and
PMR[22]4 = 1
L30
GPIO34
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 = 0
LAD2
I/O
(PU22.5)
INPCI,
OPCI
PMR[14]4 = 1 and
PMR[22]4 = 1
L31
GPIO33
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 = 0
LAD1
I/O
(PU22.5)
INPCI,
OPCI
PMR[14]4 = 1 and
PMR[22]4 = 1
M1
VSS
GND
---
---
---
M2
AD7
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A7
O
OPCI
M3
VIO
PWR
---
---
---
M4
AD8
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A8
O
OPCI
M28
GPIO32
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 = 0
LAD0
I/O
(PU22.5)
INPCI,
OPCI
PMR[14]4 = 1 and
PMR[22]4 = 1
M29
GPIO13
I/O
(PU22.5)
INAB,
O8/8
VIO
PMR[19] = 0
AB2D
I/O
(PU22.5)
INAB,
OD8
VIO
PMR[19] = 1
M30
VIO
PWR
---
---
---
M31
VSS
GND
---
---
---
N1
AD3
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A3
O
OPCI
N2
AD6
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A6
O
OPCI
N3
AD5
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A5
O
OPCI
N4
VSS
GND
---
---
---
N13
VCORE
PWR
---
---
---
N14
VCORE
PWR
---
---
---
N15
VSS
GND
---
---
---
N16
VSS
GND
---
---
---
N17
VSS
GND
---
---
---
N18
VCORE
PWR
---
---
---
N19
VCORE
PWR
---
---
---
N28
VSS
GND
---
---
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration
N29
GPIO12
I/O
(PU22.5)
INAB,
O8/8
VIO
PMR[19] = 0
AB2C
I/O
(PU22.5)
INAB,
OD8
PMR[19] = 1
N30
AB1D
I/O
(PU22.5)
INAB,
OD8
VIO
PMR[23]3 = 0
GPIO1
I/O
(PU22.5)
INT, O3/
5
PMR[23]3 = 1 and
PMR[13] = 0
IOCS1#
O
O3/5
PMR[23]3 = 1 and
PMR[13] = 1
N31
AB1C
I/O
(PU22.5)
INAB,
OD8
VIO
PMR[23]3 = 0
GPIO20
I/O
(PU22.5)
INT, O3/
5
PMR[23]3 = 1 and
PMR[7] = 0
DOCCS#
O
O3/5
PMR[23]3 = 1 and
PMR[7] = 1
P1
AD4
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A4
O
OPCI
P2
IDE_CS1#
O
O1/4
VIO
PMR[24] = 0
TFTDE
O
O1/4
PMR[24] = 1
P3
AD1
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A1
O
OPCI
P4
VCORE
PWR
---
---
---
P13
VCORE
PWR
---
---
---
P14
VCORE
PWR
---
---
---
P15
VSS
GND
---
---
---
P16
VSS
GND
---
---
---
P17
VSS
GND
---
---
---
P18
VCORE
PWR
---
---
---
P19
VCORE
PWR
---
---
---
P28
VCORE
PWR
---
---
---
P29
SDATA_OUT
O
OAC97
VIO
---
TFT_PRSNT
I
(PD100)
INSTRP
VIO
Strap (See Table 3-
6 on page 58.)
P30
SYNC
O
OAC97
VIO
---
CLKSEL3
I
(PD100)
INSTRP
Strap (See Table 3-
6 on page 58.)
P31
AC97_CLK
O
O2/5
VIO
PMR[25] = 1
R1
VSS
GND
---
---
---
R2
VSS
GND
---
---
---
R3
VSS
GND
---
---
---
R4
VSS
GND
---
---
---
R13
VSS
GND
---
---
---
R14
VSS
GND
---
---
---
R15
VSS
GND
---
---
---
R16
VSS
GND
---
---
---
R17
VSS
GND
---
---
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration
Table 3-4.
481-TEPBGA Ball Assignment - Sorted by Ball Number (Continued)



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