LTM4663 datasheet(21/30 Pages) AD

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LT8722

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Rev. 0

SUMMARY TABLE

DESCRIPTION

READ/WRITE

SIZE

ADDRESS

DEFAULT VALUE

MAIN

SPIS_COMMAND

Device Control

R/W

0x0

0x08A214

SPIS_STATUS

Device Operation Summary

R/W

0x1

DAC CONTROL

SPIS_DAC_ILIMN

DAC Positive Current Limit Control Register

R/W

0x2

0x1FF

SPIS_DAC_ILIMP

DAC Negative Current Limit Control Register

R/W

0x3

0x000

SPIS_DAC

DAC Output Voltage Control Register

R/W

0x4

0xFF000000

OV/UV CLAMP

SPIS_OV_CLAMP

DAC Output Positive Voltage Limit Control Register

R/W

0x5

0xF

SPIS_UV_CLAMP

DAC Output Negative Voltage Limit Control

R/W

0x6

0x0

AMUX

SPIS_AMUX

Analog MUX Control Register

R/W

0x7

0x00

SPI REGISTER MAP

SPI: CRC

The LT8722 uses a cyclic redundancy check (CRC) to

detect data communication errors in each SPI MOSI and

MISO packet. The CRC in the SPI frame is an 8-bit field

containing the computed CRC value spanning the com-

mand, address and data. The CRC is also sent MSB first.

The default polynomial equation used for calculating the

CRC is CRC-8-CCITT: X8 + X2 + X + 1. The default initial

seed value for calculating the CRC is 0xFF.

SPI: Status

LT8722 SPI packets always contain Status Flags (11 bits)

which are identical to the bits in the SPIS_STATUS register.

SPI ARCHITECTURE

SPI: Acknowledge

ACK[7:0] is an 8-bit field of 8-SCK cycles. Table 15 shows

the acknowledge content.

Table 15. Acknowledge Content

ACK[7:0]

DESCRIPTION

0xA5

Acknowledge

0xC3

Non-Acknowledge

0x0F

Reject Due to Unsupported Register Address

0x00

Stuck at 0

0xFF

Stuck at 1

Others

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