LTC4413 datasheet(11/32 Pages) AD

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LTC4421

Rev. 0

For more information www.analog.com

OPERATION

The LTC4421 is a Prioritized PowerPath™ Controller that

drives external N-Channel MOSFETs to connect one of

two input supplies to a common output based on user-

defined priority and validity. By definition, the supply con-

nected to V1 is the higher priority supply, and the supply

connected to V2 is lower priority, although this can be

changed dynamically. The V1 voltage can be lower than,

equal to or higher than the V2 voltage.

At initial power-up, the LTC4421 prevents the input sup-

plies from validating and connecting to the output until it

has enough bias voltage to function properly. Referring

to the Block Diagram, the LTC4421 prevents OV, UV

validation and connection to the output until the INTVCC

voltage exceeds 2.3V (VINT(UVL)) as detected by com-

parator INTVCC GOOD CP, the bandgap reference voltage

has reached its final regulated value as indicated by the

BGGOOD signal, and the CPO voltage exceeds the higher

of the CPOREF and INTVCC voltages by 6.7V (VCPO(UVL)) as

detected by comparator CPOGOOD CP. With a 1µF capaci-

tor connected between CPO and CPOREF, the Charge

Pump/LDO circuit can take several hundred milliseconds

to charge to 6.7V. See the Applications Information for

methods to reduce the charging time.

After initial power-up is complete, the LTC4421 moni-

tors the V1 and V2 voltages via resistive dividers to pre-

cision overvoltage (OV CP) and undervoltage (UV CP)

comparators. The UVR and UVF pins set the rising and

falling undervoltage thresholds for the UV comparators.

When an input voltage has been inside its OV, UV volt-

age window for a time (tVALID) set by the QUAL pin, it is

considered valid and is eligible to power the output. If the

input supply voltage falls out of the OV, UV window and

remains outside for at least 3.5µs (tINVALID), the supply is

disconnected from the output. Open drain output status

pins provide information regarding a channel’s validity

and connection status to the output. VALID1 and VALID2

are pulled low when V1 and V2, respectively, are valid.

CH1 and CH2 are pulled low when V1 and V2, respectively,

are powering VOUT.

The GATE DRIVER circuit provides strong sourcing and

sinking currents to external N-Channel MOSFETs to con-

nect and disconnect the input supplies to and from the

output. When turning on the MOSFETs, GATE DRIVER

sources current from the CPO pin to pull the GATE volt-

age up to the CPO voltage. A charge pump regulates the

CPO voltage 12V (VGATE(CL)) above the CPOREF voltage

to provide 12V of VGS enhancement to the MOSFETs.

Strong sinking currents ensure rapid turnoff of the

external MOSFETs when a channel is no longer valid, a

higher priority channel takes precedence or when com-

parator REVCUR CP detects a reverse voltage of –25mV

(VSNSDIS,REV) across the external sense resistor. Such a

reverse voltage occurs when an input supply powering

the output is shorted. Fast charge and discharge of the

external NMOS gates ensure fast switching between sup-

plies, minimizing droop at the output.

During channel transitions, monitoring circuitry prevents

cross conduction between input supplies and reverse cur-

rent from the output using a break-before-make archi-

tecture. Two VGS comparators (VGSOFF CPs) monitor

the disconnecting channel’s gate pin voltage (GATE1 or

GATE2). When the GATE voltage is 600mV (VGS(OFF))

lower than either the input or output voltage of the channel

turning off, the VGS comparators determine the external

N-channel MOSFETs to be off and allow the other channel

to connect to the output. The VGS comparator outputs are

latched in the off state; the latch is reset when the channel

is commanded to turn back on.

To prevent reverse conduction from the output to the

inputs during channel switchover, the reverse comparator

(REV CP) monitors the connecting V1, V2 supply and the

corresponding OUT1, OUT2 output. The REV comparator

prevents connection until the output droops 35mV (VREV)

below the connecting supply. The connection is latched,

resetting when the channel is commanded to disconnect.

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