LTC4413 datasheet(26/32 Pages) AD

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LTC4421

Rev. 0

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APPLICATIONS INFORMATION

Next, calculate the time it takes to charge the output volt-

age from 0V to 12V at the maximum DC load current as

shown in Equation 21 (from Equation 10).

CHG(MAX) =

(220µF • 12V)

(16.7A – 8A)

= 303µs

(21)

To ensure the output will fully charge before trigger-

ing an overcurrent fault time-out, choose CTMR1 to set

tTMR,FLT = 450µs. See Equation 22 (from Equation 13).

TMR1 =

450µs

83[µs/nF]

⎛

⎝

⎜

⎞

⎠

⎟= 5.4nF

(22)

Using the nearest standard value and accounting for tol-

erance, we choose 6.8nF, which yields tTMR,FLT = 564µs.

The power dissipation during short circuits is given by

Equation 23 (from Equation 11).

Power = (12V • 16.7A) = 200W

(23)

Referring to the SOA curves in the PSMN4R060YS data

sheet, the MOSFET can withstand 720W for 1ms at 25°C

and 12V. Derating the SOA for the maximum operating

temperature is given by Equation 24 (from Equation 12).

SOA(85°C) = 720W •

(175 – 85)

(175 – 25)

= 432W at 1ms (24)

Our overcurrent fault time-out will occur for 200W at

564µs, so the requirement is satisfied.

Next, select 47nF capacitors CG1 and CG2 to compensate

the current limit regulation loops of channels 1 and 2,

respectively. D1 and D2 are bidirectional Transient Voltage

Suppression (TVS) diodes that clamp the input voltages

below 40V at channel turn-off, thereby protecting the

LTC4421 and the N-Channel MOSFETs.

The OV, UV monitoring resistors should be chosen to yield

a total divider resistance of between 1MΩ and 2MΩ for

both low power and good transient response time. Using

Equation 1 through Equation 4 and rounding up to the

nearest 1% accurate standard resistor values, R1-R4 are

calculated by Equation 25.

Choose R1 + R2 + R3 + R4 = 1000k

Ω

(25)

From Equation 2, R1 = (0.5/15) • 1000kΩ = 33.3kΩ. The

nearest standard resistor value is 33.2kΩ.

From Equation 3, R2 = (15/11 – 1) • 33.2kΩ = 12.07kΩ.

The nearest standard value is 12.1kΩ.

From Equation 4, R3 = (11/8 – 1) • (15/11) • 33.2kΩ =

16.98kΩ. The nearest standard value is 16.9kΩ.

From Equation 5, R4 = (15/0.5 – 1) • 33.2kΩ – 12.1kΩ –

16.9kΩ = 933.8kΩ. The nearest standard value is 931kΩ.

From Equation 17, CQUAL is set to 1nF to set an OV, UV

validation time of 16ms. This gives the LTC4421 time to

pre-charge the GATE1 voltage to minimize turn-on time

when V2 is powering the output and the V1 input supply

is plugged in.

PCB Layout Considerations

To achieve accurate current sensing, Kelvin connections

are recommended for the sense resistors. The PCB lay-

out for the sense resistors should be balanced and sym-

metrical to minimize wiring errors. In addition, the PCB

layout for the sense resistors and power MOSFETs should

include good thermal management techniques for opti-

mal device power dissipation. Small resistances add up

quickly in high current applications. Note that 1oz copper

exhibits a sheet resistance of about 530µΩ/square. The

minimum trace width for 1oz copper is 0.02" per amp

(0.5mm per amp) to make sure the trace stays at a rea-

sonable temperature. Using 0.03” per amp (0.8mm per

amp) is recommended.

To improve noise immunity, put the OV, UVR, UVF resis-

tive dividers close to the LTC4421 and keep traces to GND

pin and the input supply pin short. It is also important to

put CINTVCC, the bypass capacitor for the INTVCC pin, as

close as possible between INTVCC and GND. Place CCPO,

the charge pump reservoir capacitor, as close as possible

between the CPO and CPOREF pins. Transient voltage sup-

pressors D1 and D2 are located close to the LTC4421 and

are connected between the input supply and ground using

wide traces. Figure 15 shows a recommended PCB layout

for a 2-layer board.

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