LTC4413 datasheet(20/32 Pages) AD

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LTC4421

Rev. 0

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APPLICATIONS INFORMATION

The overcurrent fault times are independently settable for

each channel. Set the time to ensure the output can charge

from 0V to the maximum input voltage, as described

above. Whenever Channel 1 experiences a current limit

fault, Channel 2 is allowed to power the output, presuming

Channel 2 is valid. Channel 2 powers the output until the

fault on Channel 1 is cleared.

The RETRY count of 6 counter on a channel is reset when-

ever its input supply is invalid, its DISABLE is driven low, or

a higher priority supply becomes valid. It is also reset when

INTVCC is below the INTVCC GOOD Threshold Voltage and

CPO is below the CPOGOOD Threshold Voltage. Toggling

the RETRY pin low, then high also resets the counter.

Iterating the Application Circuit Solution for MOSFET SOA

If the selected MOSFET does not meet the SOA require-

ments imposed by the initial current limit and output

capacitor values, take one or more of the following steps:

1. Reduce tTMR,FLT to meet the MOSFET SOA require-

ments. This requires reducing t(CHG,MAX) from

Equation 10 to ensure tTMR,FLT > t(CHG,MAX). One

way to do this is to reduce COUT. The trade-off is

an increase in output voltage droop during channel

switchover.

2. Reduce tTMR,FLT and t(CHG,MAX) by increasing the cur-

rent limit ILIM. This is only helpful if the reduction

in t(CHG,MAX) provides a larger SOA benefit than the

SOA loss caused by the increased power dissipated

in the MOSFET. For example, assume ILIM = 11A and

ILOAD,CHG = 10A. Using Equation 14.

(CHG,MAX) =

OUT • VIN,MAX )

11A −10A

OUT • VIN,MAX )

(14)

If ILIM is then increased from 11A to 20A, the new result is

given by Equation 15.

(CHG,MAX) =

OUT • VIN,MAX )

20A −10A

OUT • VIN,MAX )

10A

(15)

With t(CHG,MAX) reduced by a factor of 10, we can

reduce tTMR,FLT by a factor of 10. By doubling ILIM,

the maximum power during output short circuits has

doubled, but t(CHG,MAX) has decreased by a factor of

10, so there is a net reduction in the SOA stress. Be

sure the input power supply is capable of sourcing

more current than the new, higher value of ILIM. Also,

ensure the new ILIM does not cause UV motorboating.

3. Choose a MOSFET with higher SOA. Look for

MOSFET’s having high BVDSS, as they usually have

better SOA performance.

Charge Pump and Gate Driver Circuitry

The gate drive is provided by a charge pump circuit

that powers CPO. A curve of GATE pin voltage versus

output voltage is shown in the Typical Performance

Characteristics curves. For output voltages less than 4V,

the minimum gate drive voltage is 9V. When the output

voltage is higher than 5V, the gate drive is at least 10V.

A burst mode comparator ensures the gate drive never

exceeds 14V.

When an input supply is invalid, the LTC4421 drives the

GATE pin voltage close to ground using a 50mA pull-

down current. When a supply is valid but turned off, gate

driver parking circuitry regulates the GATE voltage to

1V below the lower of the channel input voltage and the

output voltage. This is called the GATE Parking Voltage.

The LTC4421 also sinks 5µA from the SOURCE pin to

bias the external MOSFETs at their threshold voltages,

to minimize the ΔVGS and hence the turn-on time during

channel switchover when the MOSFETs are turned back

on. If possible, choose a lower threshold MOSFET for

the output MOSFET to preferentially draw the SOURCE

current from VOUT instead of the input supply of the off

channel, and add a resistor from SOURCE to ground to

increase current and hence the VGS.

CPO Charge Pump Capacitor Selection

Connect a reservoir capacitor CCPO between CPO and

CPOREF to provide the charge necessary to turn on the

MOSFETs quickly. The recommended value is approxi-

mately 10× the combined input CISS capacitances of the

two back-to-back MOSFETs on one channel, plus any dis-

crete GATE-to-SOURCE capacitor CG that has been added

to stabilize the current limit loop. A larger CCPO capacitor

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