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LTC4413 Datasheet(PDF) 18 Page - Analog Devices

Part # LTC4413
Description  High Power Prioritized PowerPath Controller
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC4413 Datasheet(HTML) 18 Page - Analog Devices

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LTC4421
18
Rev. 0
For more information www.analog.com
After calculating the power, refer to the SOA curves in the
MOSFET manufacturer’s data sheet. The SOA curves are
usually specified at 25°C and must be adjusted to account
for the highest operating ambient temperature TA as given
by Equation 12.
SOA(T
A ) = SOA(25°C) •
T
JMAX – TA
(
)
T
JMAX – 25°C
(
)
(12)
Where TJMAX is the maximum allowed junction tempera-
ture of the MOSFET. Most of the recommended MOSFETs
have TJMAX =175°C. As a result, multiply the y-axis values
of the SOA curves by 0.6 for TA = 85°C, and multiply by
0.333 for TA = 125°C.
Note that MOSFET data sheets usually show a family
of 5-6 SOA curves, with each curve separated from the
next by a factor of 10 in time (e.g., 100µs, 1ms, 10ms,
etc.). To be conservative, choose the time curve closest
to and higher than tTMR,FLT and make sure the MOSFET
can handle the power in Equation 11.
When the output is hard-shorted to ground, such that the
output voltage is below 410mV, the LTC4421 implements
a stepped foldback feature, reducing the short circuit cur-
rent, and hence the power, by a factor of two. As a result,
the LTC4421 provides more SOA margin for the MOSFET
for hard shorts than resistive shorts. See procedures out-
lined in this section and the SOA curves in the chosen
MOSFET manufacturer’s data sheet to verify suitability
for the application.
APPLICATIONS INFORMATION
Overcurrent Faults and Retry
The LTC4421 features an adjustable current limit that protects
against output short circuits and excessive load current. An
overcurrent fault occurs when the current limit circuitry has
been engaged for longer than the time set by the TMR pin.
When the output load current is less than ILIM, the LTC4421
pre-biases the TMR pin voltage to its DC TMR Parking
Voltage. When the LTC4421 is regulating the output current
to ILIM, it sources 6µA out of the TMR pin to charge the exter-
nal TMR capacitor. When the TMR pin voltages increases
by 500mV from the TMR Parking Voltage, an overcurrent
fault occurs. The FAULT open-drain output pull-down pin is
latched low, and the input is disconnected from the output.
Connect a capacitor CTMRbetween TMR and ground and use
Equation 13 to set the overcurrent fault time tTMR,FLT.
t
TMR,FLT = CTMR • 83 µs/nF
[
]
(13)
Note that pulsed current loads exceeding the programmed
current limit and having duty cycle > 25% will integrate
over time and cause a current limit fault.
After an overcurrent fault occurs, the subsequent func-
tionality depends on the configuration of the DISABLE,
FAULT and RETRY pins. Figure 6 shows a timing diagram
for an overcurrent fault occurring on Channel 1 where
the RETRY pin is set low, FAULT1 is pulled up to a supply
voltage with a 100k resistor and the user drives DISABLE1
with a digital signal. For simplicity, there is no input supply
connected to V2.
OUT1
I(RSENSE1)
TMR1
FAULT1
DISABLE1
tTMR,FLT
COOL DOWN TIME = (1024 • tTMR,FLT)
OVERCURRENT
FAULT
OUTPUT SHORT
TO GROUND
USER
INITIATES
COOL DOWN
COOL DOWN
COMPLETE
LTC4421 F06
RECONNECT
OUTPUT SHORT
RELEASED
Figure 6. Manual Retry after Overcurrent Fault on Channel 1. Conditions: RETRY = 0V,
User Driven DISABLE1 and Output Short Released During Cool Down Time



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