LTC4413 datasheet(23/32 Pages) AD

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LTC4421

Rev. 0

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across the sense resistor exceeds 30mV, the LTC4421

sinks 50mA from the GATE pin of the shorted channel to

turn off the N-Channel MOSFETs, thereby disconnecting

the input from the output. Assuming the input is still valid,

reconnection occurs when the output voltage drops 35mV

below the input.

When the output is shorted to ground, the voltage across

the sense resistor may exceed 25mV until the current

limit loop enters regulation. When the forward voltage

across the sense resistors exceeds 50mV, the LTC4421

sinks 50mA from the GATE pin to quickly reduce the VGS

of the N-Channel MOSFETs. The 50mA sink current is

turned off when the voltage across the sense resistor falls

below 25mV.

When the output is shorted to ground, the current limit

circuitry will regulate the current to ILIM. When the cur-

rent limit circuitry has been engaged for longer than the

time set by the TMR pin, a current limit fault is registered.

The input is disconnected from the output, and FAULT is

driven low.

For large input and output inductances, rapid changes

in current during short circuit events and channel turn-

off can cause transient voltages that exceed the Absolute

Maximum ratings of the input and output pins and/or vio-

late the BVDSS limits of the external MOSFETs. To minimize

APPLICATIONS INFORMATION

such transients, use wider PCB traces and heavier trace

plating to reduce power trace inductance. External to

the PCB, twist the power and ground wires together to

minimize inductance. Although the input snubber helps

dissipate the input inductive energy at channel turn-off,

transient voltage suppressor (TVS) D1 is still needed to

clamp the peak input voltage, as shown in Figure 12.

When selecting transient voltage suppressors, ensure the

reverse standoff voltage (VR) is equal to or greater than

the application operating voltage, the peak pulse current

(IPP) is higher than the peak transient voltage divided by

the source impedance, and the maximum clamping volt-

age (VCLAMP) at the rated IPP is less than the Absolute

Maximum ratings of the LTC4421 and the BVDSS of the

external MOSFETs. The LTC4421’s Absolute Maximum

Voltage Ratings of V1 and V2 allow it to withstand supply

side inductive voltage spikes up to 60V. A range of TVS’s

can be used accommodating VR ratings up to 36V and

VCLAMP ratings up to 60V.

Cascading

Multiple LTC4421’s can be cascaded to prioritize more

than two input supplies. To prioritize three or four sup-

plies, use two LTC4421’s with their OUT pins connected

together, and connect CASOUT of the higher priority

PSMN4R060YS

PSMN1R440YLD 2.5m

RSENSE

CG1

47nF

RSN

CSN

COUT1

220µF

SMDJ36A

VOUT

INPUT

PARASITIC

INDUCTANCE

LTC4421 F12

GATE1 SOURCE1

SENSE1 OUT1

LTC4421

Figure 12. Supply Voltage Transient Suppression Circuitry

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