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[v2-11] 2016-Jun-13

AS3911 − Application Information

Reading Received Data from FIFO

Reading received data from the FIFO is similar to reading data

from an addressable registers. Difference is that in case of

reading more bytes they all come from the FIFO. SPI operation

mode bits 10 indicate FIFO operations. In case of reading the

received data from the FIFO all bits <C5 – C0> are set to 1. On

the following SCLK rising edges the data from FIFO appears as

in case of read data from addressable registers. In case the

command is terminated by putting /SS high before a packet of

8 bits composing one byte is read that particular byte is

considered unread and will be the first one read in next FIFO

read operation.

Figure 30:

SPI Communication: Reading of FIFO

/S S

SC LK

MOS I

MIS O

1 to 96

bytes

tristate

SC LK rising

edge D ata is

transfered

from µ C

S C LK falling

edge D ata is

sam pled

10 pattern

indicates

FIFO m ode

SC LK rising

edge D ata is

moved from

FIFO

S C LK falling

edge D ata is

transfered to

µC

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