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PC8374L Datasheet(PDF) 198 Page - National Semiconductor (TI) |
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PC8374L Datasheet(HTML) 198 Page - National Semiconductor (TI) |
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198 / 239 page  9.0 Legacy Functional Blocks (Continued) www.national.com 198 Revision1.1 Table 69. Bank 1 Register Map Offset Mnemonic Register Name Type 00h LBGD(L) Legacy Baud Generator Divisor (Low Byte) R/W 01h LBGD(H) Legacy Baud Generator Divisor (High Byte) R/W 02h Reserved 03h LCR/BSR Link Control/ Bank Select R/W 04h-07h Reserved Table 70. Bank 2 Register Map Offset Mnemonic Register Name Type 00h BGD(L) Baud Generator Divisor (Low Byte) R/W 01h BGD(H) Baud Generator Divisor (High Byte) R/W 02h EXCR1 Extended Control 1 R/W 03h BSR Bank Select R/W 04h EXCR2 Extended Control 2 R/W 05h Reserved 06h TXFLV TX_FIFO Level RO 07h RXFLV RX_FIFO Level RO Table 71. Bank 3 Register Map Offset Mnemonic Register Name Type 00h MRID Module Identification and Revision ID RO 01h SH_LCR Shadow of LCR RO 02h SH_FCR Shadow of FIFO Control RO 03h BSR Bank Select R/W 04h-07h Reserved Winbond Electronics Corp. Advanced PC Product Center |
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