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PC8374L Datasheet(PDF) 200 Page - National Semiconductor (TI) |
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PC8374L Datasheet(HTML) 200 Page - National Semiconductor (TI) |
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200 / 239 page ![]() 9.0 Legacy Functional Blocks (Continued) www.national.com 200 Revision1.1 9.4 SERIAL PORT 2 (SP2) 9.4.1 General Description This functional block provides advanced, versatile serial communications features with IR capabilities. It supports four modes of operation: UART, Sharp-IR, IrDA 1.0 SIR (hereafter SIR), and Consumer Electronic IR (also called TV Remote or Consumer remote control, hereafter CEIR). In UART mode, the Serial Port can function in 16450-Compatible mode, 16550- Compatible mode, or Extended mode. This chapter describes general implementation of the Enhanced Serial Port with Fast IR. For device specific implementation, see Device Architecture and Configuration in the datasheet of the relevant device. Existing 16550-based legacy software is completely and transparently supported. Organization and specific fallback mech- anisms switch the Serial Port to 16550-Compatible mode on reset, or when initialized by 16550 software. The Serial Port has two DMA channels; the device can use either one or both of them. One channel is required for IR based applications, since IR communication works in half duplex fashion. Two channels would normally be needed to handle high- speed, full duplex, UART based applications. 9.4.2 Register Bank Overview Eight register banks, each containing eight registers, control Serial Port operation. All registers use the same 8-byte address space to indicate offsets 00h-07h. The active bank must be selected by the software. The register bank organization enables access to the banks as required for activation of all module modes, while maintaining transparent compatibility with 16450 or 16550 software. The Bank Selection register (BSR) selects the active bank and is common to all banks. See Figure 39. Therefore, each bank defines seven new registers. The default bank selection after system reset is 0. Table 74. Bank 2 Bitmap Register Bits Offset Mnemonic 7 6 5 4 3 2 1 0 00h BGD(L) BGD7-0 01h BGD(H) BGD15-8 02h EXCR1 BTEST Reserved ETDLBK LOOP Reserved EXT_SL 03h BSR BKSE BSR6-0 04h EXCR2 LOCK Reserved PRESL1-0 Reserved 05h Reserved 06h TXFLV Reserved TFL4-0 07h RXFLV Reserved RFL4-0 Table 75. Bank 3 Bitmap Register Bits Offset Mnemonic 7 6 5 4 3 2 1 0 00h MRID MID3-0 RID3-0 01h SH_LCR BKSE SBRK STKP EPS PEN STB WLS1-0 02h SH_FCR RXFTH1-0 TXFTH1-0 Reserved TXSR RXSR FIFO_EN 03h BSR BKSE BSR6-0 04-07h Reserved Winbond Electronics Corp. Advanced PC Product Center |
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