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PC8374L Datasheet(PDF) 225 Page - National Semiconductor (TI) |
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PC8374L Datasheet(HTML) 225 Page - National Semiconductor (TI) |
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225 / 239 page  10.0 Device Characteristics (Continued) Revision 1.1 225 www.national.com LPC Signals Symbol Figure Description Reference Conditions Min Max Unit tVAL Outputs Output Valid Delay After RE of CLK 2 11 ns tON Outputs Float to Active Delay After RE of CLK 2 ns tOFF Outputs Active to Float Delay After RE of CLK 28 ns tSU Inputs Input Setup Time Before RE of CLK 7 ns tHL Inputs Input Hold Time After RE of CLK 0 ns Leakage Only Leakage Only 0.615 VDD3 0.4 VDD3 0.4 VDD3 PCI_CLK LAD3 −LAD0, LDRQ, SERIRQ Outputs tVAL tON tOFF VDD3 = 3.3V ±10% tVAL LAD3 −LAD0, SERIRQ Output Enabled 0.285 VDD3 0.4 VDD3 0.4 VDD3 PCI_CLK LAD3 −LAD0, LFRAME SERIRQ Inputs VDD3 = 3.3V ±10% tHL tSU Winbond Electronics Corp. Advanced PC Product Center |
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