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PC8374L Datasheet(PDF) 228 Page - National Semiconductor (TI) |
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PC8374L Datasheet(HTML) 228 Page - National Semiconductor (TI) |
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228 / 239 page ![]() 10.0 Device Characteristics (Continued) www.national.com 228 Revision1.1 10.4.6 Parallel Port Timing Standard Parallel Port Timing Enhanced Parallel Port Timing Symbol Parameter Conditions Min Max Unit tPDH Port Data Hold SPP Mode 0 and Mode 1, ECP Mode 0 and Mode1: system dependent; ECP Mode 2: device dependent. 750 ns tPDS Port Data Setup SPP Mode 0 and Mode 1, ECP Mode 0 and Mode1: system dependent; ECP Mode 2: device dependent. 750 ns tSW Strobe Width SPP Mode 0 and Mode 1, ECP Mode 0 and Mode1: system dependent; ECP Mode 2: device dependent. 750 ns Symbol Parameter Min Max EPP 1.71 1. Also in ECP Mode 4. EPP 1.91 Unit tWW19a WRITE Active from WAIT Low 45 ✔ ns tWW19ia WRITE Inactive from WAIT Low 45 ✔ ns tWST19a DSTRB or ASTRB Active from WAIT Low 65 ✔ ns tWEST DSTRB or ASTRB Active after WRITE Active 10 ✔✔ ns tWPDH PD7 −0 Hold after WRITE Inactive 0 ✔✔ ns tWPDS PD7 −0 Valid after WRITE Active 15 ✔✔ ns tEPDW PD7 −0 Valid Width 80 ✔✔ ns tEPDH PD7 −0 Hold after DSTRB or ASTRB Inactive 0 ✔✔ ns tPDS tPDH tSW BUSY ACK PD7 −0 STB WRITE DSTRB ASTRB PD7 −0 WAIT Valid tWW19ia tWPDH tEPDH tEPDW or tWW19a tWST19a tWPDS tWEST tWST19a Winbond Electronics Corp. Advanced PC Product Center |
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