AD1941 datasheet(13/32 Pages) AD

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Preliminary Technical Data

AD1941

Rev. PrE | Page 13 of 32

SIGNAL PROCESSING

OVERVIEW

The AD1941 is designed to provide all signal processing

functions commonly used in stereo or multichannel playback

systems. The signal processing flow is set by using the ADI-

supplied software, which allows graphical entry and real-time

control of all signal processing functions.

Many of the signal processing functions are coded using full,

56-bit double-precision arithmetic. The input and output word

lengths are 24 bits. Four extra headroom bits are used in the

processor to allow internal gains up to 24 dB without clipping.

Additional gains can be achieved by initially scaling down the

input signal in the signal flow.

The signal processing blocks can be arranged in a custom pro-

gram that can be loaded to the AD1941’s RAM. The available

signal processing blocks are explained in the following sections.

NUMERIC FORMATS

It is common in DSP systems to use a standardized method of

specifying numeric formats. Fractional number systems are

specified by an A.B format, where A is the number of bits to the

left of the decimal point and B is the number of bits to the right

of the decimal point.

The AD1941 uses the same numeric format for both the coeffi-

cient values (stored in the parameter RAM) and the signal data

values. The format is as follows:

Numerical Format: 5.23

Range: –16.0 to (+16.0 − 1 LSB)

Examples:

1000000000000000000000000000 = –16.0

1110000000000000000000000000 = –4.0

1111100000000000000000000000 = –1.0

1111111000000000000000000000 = –0.25

1111111111111111111111111111 = (1 LSB below 0.0)

0000000000000000000000000000 = 0.0

0000001000000000000000000000 = 0.25

0000100000000000000000000000 = 1.0

0010000000000000000000000000 = 4.0

0111111111111111111111111111 = (16.0 – 1 LSB).

The serial port accepts up to 24 bits on the input and is sign-

extended to the full 28 bits of the core. This allows internal

gains of up to 24 dB without encountering internal clipping.

A digital clipper circuit is used between the output of the DSP

core and the serial output ports (see Figure 7). This clips the top

four bits of the signal to produce a 24-bit output with a range of

1.0 (minus 1 LSB) to –1.0.

4-BIT SIGN EXTENSION

DATA IN

SERIAL PORT

1.23

5.23

SIGNAL PROCESSING

(5.23 FORMAT)

DIGITAL

CLIPPER

5.23

1.23

Figure 7. Numeric Precision and Clipping Structure

PROGRAMMING

On power-up, the AD1941’s default program passes the unpro-

cessed input signals to the outputs but the outputs come up

muted by default (see Power-Up Sequence section). There are

1,536 instruction cycles per audio sample, resulting in an inter-

nal clock rate of 73.728 MHz (for fs = 48 kHz). This DSP runs in

a stream-oriented manner, meaning all 1,536 instructions are

executed each sample period. The AD1941 may also be set

up to accept double or quad-speed inputs by reducing the

number of instructions/sample, which can be set in the core

control register.

The part can be programmed easily using graphical tools pro-

vided by Analog Devices. No knowledge of writing DSP code is

needed to program this part. The user can simply connect

graphical blocks such as biquad filters, dynamics processors,

mixers, and delays in a signal flow schematic, compile the

design, and load the program and parameter files into the

AD1941’s Program RAM through the control port. Signal

processing blocks available in the provided libraries include

•

Single- and double-precision biquad filters

•

Mono and multichannel dynamics processors

•

Mixers and splitters

•

Tone and noise generators

•

First-order filters

•

Fixed and variable gain

•

RMS look-up tables

•

Loudness

•

Delay

•

Stereo enhancement (Phat Stereo™)

•

Interpolators and Decimators

More blocks are always in development. Analog Devices also

provides proprietary and third-party algorithms for applications

such as matrix decoding, bass enhancement, and surround

virtualizers. Please contact ADI for information about licensing

these algorithms.

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