ADPD4200 datasheet(30/93 Pages) AD

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Data Sheet

ADPD4200

APPLICATIONS INFORMATION

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fourth pulses, effectively cancelling out the ambient light, electrical

offsets, and drift.

Additionally, set the INPUT_R_SELECT_x bit field equal to 1 to

place a 6.5 kΩ resistor in series between the photodiode and the

TIA input to slow the inrush of current from the photodiode when

the input switch is closed.

Table 19 details the relevant registers for float LED mode.

Figure 27. Four Pulse Float Mode Operation

Table 19. Float LED Mode Settings

Group

Time Slot A Register Address1 Bit Field Name

Description

Signal Path Setup

0x0100, Bits[13:12]

SAMPLE_TYPE_x

Leave at the default setting (0) for default sampling mode.

0x0100, Bits[11:10]

INPUT_R_SELECT_x

Set to 0x1 for 6.25 kΩ series input resistor.

0x0101, Bits[8:0]

AFE_PATH_CFG_x

Set to 0x0E6 for TIA, integrator, and ADC. Bypass BPF.

0x0102, Bits[15:12], 0x0102,

Bits[3:0]

INPxx_x

Enable desired inputs.

0x0103, Bits[14:12]

PRECON_x

Set to 0x4 to precondition anode of photodiode to the input of the TIA.

0x0103, Bits[7:6], 0x0103,

Bits[1:0]

VCx_SEL_x

Set to 0x2 to set ~250 mV reverse bias across photodiode.

0x0104, Bits[5:0]

TIA_GAIN_CHx_x

Select TIA gain (100 kΩ or 200 kΩ for float mode).

0x0104, Bits[9:8]

AFE_TRIM_VREF_x

Set to 0x2 to set TIA_VREF = 0.9 V.

Float Mode Configuration 0x0107, Bits[15:8]

NUM_INT_x

Set to 1 for a single integration per group of ADC conversions.

0x0107, Bits[7:0]

NUM_REPEAT_x

Number of sequence repeats. Must be set to a multiple of 2 for float mode.

0x0108, Bits[13:12]

MOD_TYPE_x

Set to 0x1 for float mode operation.

0x0108, Bits[9:0]

MIN_PERIOD_x

Set the period to accommodate float time plus connect time, in 1 μs increments.

0x010A, Bits[4:0]

INTEG_WIDTH_x

Integration time in µs. Set to MOD_WIDTH_x + 1.

0x010A, Bits[10:8], 0x010A,

Bits[14:12]

CHx_AMP_DISABLE_x

Set 0x010A, Bit 9 to 1 to power down the BPF for Channel 1, and Bit 13 to 1 to

power down the BPF for Channel 2 if Channel 2 is enabled.

0x010B, Bits[12:0]

INTEG_OFFSET_x

Integration sequence start time. Set to (MOD_OFFSET_x − INTEG_WIDTH_x –

250 ns).

0x010C, Bits[15:8]

MOD_WIDTH_x

Sets width of connect pulse in 1 μs increments. Typical values of 2 μs or 3 μs.

0x010C, Bits[7:0]

MOD_OFFSET_x

Sets start time of first connect pulse in 1 μs increments.

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