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ADPD4200 Datasheet(PDF) 43 Page - Analog Devices |
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ADPD4200 Datasheet(HTML) 43 Page - Analog Devices |
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43 / 93 page  Data Sheet ADPD4200 REGISTER MAP analog.com Rev. 0 | 43 of 93 Table 25. Register Map Summary Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Reg Name Bits Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset R/W 0x0000 FIFO_ STATUS [15:8] CLEAR_ FIFO INT_FIFO_ UFLOW INT_FIFO _ OFLOW Reserved FIFO_BYTE_COUNT[10:8] 0x0000 R/W [7:0] FIFO_BYTE_COUNT[7:0] 0x0001 INT_ STATUS_ DATA [15:8] INT_FIFO_ TH Reserved INT_ DATA_L INT_ DATA_K INT_ DATA_J INT_ DATA_I 0x0000 R/W [7:0] INT_DATA_H INT_DATA_G INT_ DATA_F INT_ DATA_E INT_ DATA_D INT_ DATA_C INT_ DATA_B INT_ DATA_A 0x0002 INT_ STATUS_ LEV0 [15:8] Reserved INT_LEV0_ L INT_ LEV0_K INT_ LEV0_J INT_ LEV0_I 0x0000 R/W [7:0] INT_LEV0_H INT_LEV0_G INT_ LEV0_F INT_ LEV0_E INT_LEV0_ D INT_ LEV0_C INT_ LEV0_B INT_ LEV0_A 0x0003 INT_ STATUS_ LEV1 [15:8] Reserved INT_LEV1_ L INT_ LEV1_K INT_ LEV1_J INT_ LEV1_I 0x0000 R/W [7:0] INT_LEV1_H INT_LEV1_G INT_ LEV1_F INT_ LEV1_E INT_LEV1_ D INT_ LEV1_C INT_ LEV1_B INT_ LEV1_A 0x0006 FIFO_TH [15:8] Reserved FIFO_TH[9:8] 0x0000 R/W [7:0] FIFO_TH[7:0] 0x0007 INT_ACLEAR [15:8] INT_ ACLEAR_ FIFO Reserved INT_ ACLEAR_ DATA_L INT_ ACLEAR_ DATA_K INT_ ACLEAR_ DATA_J INT_ ACLEAR_ DATA_I 0x8FFF R/W [7:0] INT_ ACLEAR_ DATA_H INT_ ACLEAR_ DATA_G INT_ ACLEAR_ DATA_F INT_ ACLEAR_ DATA_E INT_ ACLEAR_ DATA_D INT_ ACLEAR_ DATA_C INT_ ACLEAR_ DATA_B INT_ ACLEAR_ DATA_A 0x0008 CHIP_ID [15:8] Version 0x00C2 R [7:0] CHIP_ID 0x0009 OSC32M [15:8] Reserved 0x0090 R/W [7:0] OSC_32M_FREQ_ADJ[7:0] 0x000A OSC32M_ CAL [15:8] OSC_32M_ CAL_START OSC_32M_CAL_COUNT[14:8] 0x0000 R/W [7:0] OSC_32M_CAL_COUNT[7:0] 0x000B OSC1M [15:8] Reserved CLK_CAL_ ENA OSC_1M_FREQ_ ADJ[9:8] 0x02B2 R/W [7:0] OSC_1M_FREQ_ADJ[7:0] 0x000C OSC32K [15:8] CAPTURE_ TIMESTAMP Reserved 0x0012 R/W [7:0] Reserved OSC_32K_ADJUST[5:0] 0x000D TS_FREQ [15:8] TIMESLOT_PERIOD_L[15:8] 0x2710 R/W [7:0] TIMESLOT_PERIOD_L[7:0] 0x000E TS_FREQH [15:8] Reserved 0x0000 R/W [7:0] Reserved TIMESLOT_PERIOD_H[7:0] 0x000F SYS_CTL [15:8] SW_RESET Reserved ALT_CLOCKS[1:0] 0x0000 R/W [7:0] ALT_CLK_GPIO[1:0] Reserved LFOSC_ SEL OSC_ 1M_EN OSC_ 32K_EN 0x0010 OPMODE [15:8] Reserved TIMESLOT_EN[3:0] 0x0000 R/W [7:0] Reserved OP_ MODE |
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