ADPD4200 datasheet(38/93 Pages) AD

38 / 93 page

Data Sheet

ADPD4200

APPLICATIONS INFORMATION

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Rev. 0 | 38 of 93

Timing Recommendations for Digital

Integration Modes

When setting the timing for digital integration mode, it is important

to place the ADC samples such that the signal being sampled is

given time to settle prior to the sample being taken. The settling

time of the input signal is affected by the photodiode capacitance

and the TIA settling time. Figure 36 shows an example of proper

placement of the ADC sampling edges. Calculations for the offset

values are as follows:

DARK1_OFFSET_x = (LED_OFFSET_x – (NUM_INT_x + 1))

Add 1 to the number of ADC conversions such that there is 1 μs of

margin added to the placement of the Dark 1 region samples with

respect to the beginning of the LED pulse.

LIT_OFFSET_x = (LED_OFFSET_x + tD)

where tD is the delay built into the offset setting to allow settling

time of the signal. This value must be characterized in the final

application.

DARK2_OFFSET_x = (LED_OFFSET_x + LED_WIDTH_x + tD)

This setting only applies to two-region digital integration mode.

Figure 36. Proper Placement of ADC Sampling Edges in Digital Integration

Mode

TIA ADC MODE

Figure 37 shows the TIA ADC mode, which bypasses the BPF

and routes the TIA output through a buffer directly into the ADC.

TIA ADC mode is useful in applications, such as ambient light

sensing, and measuring of other dc signals, such as leakage

resistance. In photodiode measurement applications using the BPF,

all background light is blocked from the signal chain and, therefore,

cannot be measured. TIA ADC mode can measure the amount

of background and ambient light. This mode can also measure

currents from other dc sources, such as leakage resistance.

Figure 37. TIA ADC Mode Block Diagram

When the devices are in TIA ADC mode, the BPF is bypassed, and

the integrator stage is reconfigured as a buffer. If both Channel 1

and Channel 2 are enabled in a single time slot, the ADC samples

Channel 1 and then Channel 2 in sequential order in 1 µs intervals.

The recommended TIA ADC mode is one in which the BPF is

bypassed, and the integrator is configured as an inverting buffer.

This mode is enabled by writing 0x0E6 to AFE_PATH_CFG_x

(Register 0x0101, Bits[8:0] for Time Slot A) to enable a signal path

that includes the TIA, integrator, and ADC. Additionally, to configure

the integrator as a buffer, set AFE_INT_C_BUF_x

(Register 0x010A, Bit 11 for Time Slot A). With the ADC offset

registers, ADC_OFF1_x and ADC_OFF2_x, set to 0 and TIA_VREF

set to 1.265 V, the output of the ADC is at ~3000 codes for a single

pulse and a zero input current condition. As the input current from

the photodiode increases, the ADC output increases toward

16,384 LSBs.

When configuring the integrator as a buffer, there is the option

of either using a gain of 1 or a gain of 0.7. Using the gain of

0.7 increases the usable dynamic range at the input to the TIA.

However, it is possible to overrange the ADC in this configuration,

and care must be taken to not saturate the ADC. To set the buffer

gain, use the CHx_TRIM_INT_x bits. Setting CHx_TRIM_ INT_x to

00 or 01 sets a gain of 1. Setting CHx_TRIM_INT_x to 10 or 11

configures the buffer with a gain of 0.7.

Calculate the ADC output (ADCOUT) as follows:

ADCOUT=8192− 2×TIA_VREF−2

×IINPUT_TIA×RF−1.8 V/146 μV/LSB

×Buffer Gain

(3)

where:

TIA_VREF is the internal voltage reference signal for the TIA (the

default value is 1.265 V).

IINPUT_TIA is the input current to the TIA.

RF is the TIA feedback resistor.

Buffer Gain is either 0.7 or 1 based on the setting of the

CHx_TRIM_INT_x bits.

Equation 3 is an approximation and does not account for internal

offsets and gain errors. The calculation also assumes that the ADC

offset registers are set to 0.

Configuring a one time slot in TIA ADC mode is useful for monitor-

ing ambient and pulsed signals at the same time. The ambient

signal is monitored during the time slot configured for TIA ADC

ADPD4200 Datasheet(PDF) 38 Page - Analog Devices

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