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Data Sheet

ADPD4200

APPLICATIONS INFORMATION

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Rev. 0 | 31 of 93

Table 19. Float LED Mode Settings

Group

Time Slot A Register Address1 Bit Field Name

Description

0x010D, Bits[7:4]

SUBTRACT_x

In any given sequence of four pulses, negate the math operation in the selected

position. Selections are active high (that is, subtract if 1) and the LSB of this

the LED flashes and subtract pulses when the LED is disabled, according to

LED_DISABLE_x.

LED Settings

0x0105, Bit 15 and 0x0105, Bit 7,

0x0106, Bit 15 and 0x0106, Bit 7

LED_DRIVESIDEx_x

Select LED for time slot used.

0x0105, Bits[14:8], 0x0105,

Bits[6:0], 0x0106, Bits[14:8],

0x0106, Bits[6:0]

LED_CURRENTx_x

Set LED current for selected LED.

0x0109, Bits[7:0]

LED_OFFSET_x

Sets start time of first LED pulse in 1 μs increments.

0x0109, Bits[15:8]

LED_WIDTH_x

Sets width of LED pulse in 1 μs increments.

0x010D, Bits[15:12]

LED_DISABLE_x

In any given sequence of four pulses, disable the LED pulse in the selected

position. Selections are active high (that is, disable LED if 1) and the LSB

of this register maps to the first pulse. For a sequence of four pulses, it is

recommended to turn on the LED in the second and third pulses by writing 0x9

to this register.

1 This is the Time Slot A register address. Add 0x020 for the identical register address for each subsequent time slot. For example, Register 0x0100 is the location

for SAMPLE_TYPE_A. For Time Slot B, this register is at Address 0x0120. For Time Slot C, this register is at Address 0x0140. For Time Slot D, this register is at

Address 0x0160, and so on.

Float Mode Limitations

When using float mode, the limitations of the mode must be well

understood. For example, a finite amount of charge can accumulate

on the capacitance of the photodiode, and there is a maximum

amount of charge that can be integrated by the integrator. Based on

an initial reverse bias of 250 mV on the photodiode and assuming

that the photodiode begins to become nonlinear at ~200 mV of

forward bias, there is ~450 mV of headroom for the anode voltage

to increase from its starting point at the beginning of the float time

before the charge ceases to accumulate in a linear fashion. It is

desirable to operate only in the linear region of the photodiode (see

Figure 28). To verify that float mode is operating in the linear region

of the diode, the user can perform a simple check. Record data at

a desired float time and then record data at half the float time. The

recommended ratio of the two received signals is 2:1. If this ratio

does not hold true, the diode is likely beginning to forward bias at

the longer float time and becomes nonlinear.

Figure 28. Integrated Charge on the Photodiode vs. Float Time

The maximum amount of charge that can be stored on the photo-

diode capacitance and remain in the linear operating region of the

sensor is estimated by

Q = CPD V

where:

Q is the integrated charge.

CPD is the capacitance of the photodiode.

V is the amount of voltage change across the photodiode before the

photodiode becomes nonlinear.

For a typical discrete optical design using a 7 mm2 photodiode with

70 pF capacitance and 450 mV of headroom, the maximum amount

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