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CS47L85 Datasheet(PDF) 187 Page - Cirrus Logic

Part # CS47L85
Description  Low-Power Smart Codec with Seven DSP Cores, Voice and Media Enhancement, and Integrated Sensor Hub
PDF  370 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L85 Datasheet(HTML) 187 Page - Cirrus Logic

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CS47L85
Rev 4.3
187
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R1353
(0549h)
to
R1360
(0550h)
5:0
AIF2TX1_SLOT
[5:0]
0h
AIF2 TX Channel n Slot position
Defines the TX timeslot position of the
Channel n audio sample
Integer (LSB=1); Valid from 0 to 63
5:0
AIF2TX2_SLOT
[5:0]
1h
5:0
AIF2TX3_SLOT
[5:0]
2h
5:0
AIF2TX4_SLOT
[5:0]
3h
5:0
AIF2TX5_SLOT
[5:0]
4h
5:0
AIF2TX6_SLOT
[5:0]
5h
5:0
AIF2TX7_SLOT
[5:0]
6h
5:0
AIF2TX8_SLOT
[5:0]
7h
R1361
(0551h)
to
R1368
(0558h)
5:0
AIF2RX1_SLOT
[5:0]
0h
AIF2 RX Channel n Slot position
Defines the RX timeslot position of the
Channel n audio sample
Integer (LSB=1); Valid from 0 to 63
5:0
AIF2RX2_SLOT
[5:0]
1h
5:0
AIF2RX3_SLOT
[5:0]
2h
5:0
AIF2RX4_SLOT
[5:0]
3h
5:0
AIF2RX5_SLOT
[5:0]
4h
5:0
AIF2RX6_SLOT
[5:0]
5h
5:0
AIF2RX7_SLOT
[5:0]
6h
5:0
AIF2RX8_SLOT
[5:0]
7h
Table 50 AIF2 Digital Audio Data Control
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R1412
(0584h)
AIF3_For
mat
2:0
AIF3_FMT [2:0]
000
AIF3 Audio Interface Format
000 = DSP Mode A
001 = DSP Mode B
010 = I2S mode
011 = Left Justified mode
Other codes are Reserved
This field is locked when AIF3 channels
are enabled; it can only be changed when
all AIF3 channels are disabled.
R1415
(0587h)
AIF3_Fra
me_Ctrl_1
13:8
AIF3TX_WL [5:0]
18h
AIF3 TX Word Length
(Number of valid data bits per slot)
Integer (LSB = 1); Valid from 16 to 32
7:0
AIF3TX_SLOT_L
EN [7:0]
18h
AIF3 TX Slot Length
(Number of BCLK cycles per slot)
Integer (LSB = 1); Valid from 16 to 128
R1416
(0588h)
AIF3_Fra
13:8
AIF3RX_WL [5:0]
18h
AIF3 RX Word Length
(Number of valid data bits per slot)
Integer (LSB = 1); Valid from 16 to 32



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