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CS47L85 Datasheet(PDF) 286 Page - Cirrus Logic

Part # CS47L85
Description  Low-Power Smart Codec with Seven DSP Cores, Voice and Media Enhancement, and Integrated Sensor Hub
PDF  370 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L85 Datasheet(HTML) 286 Page - Cirrus Logic

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CS47L85
286
Rev 4.3
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R6557
(199Dh)
IRQ2_Raw
_Status_30
6
DSP7_BUSY_ST
S2
0
DSPn Busy status
0 = DSP Idle
1 = DSP Busy
5
DSP6_BUSY_ST
S2
0
4
DSP5_BUSY_ST
S2
0
3
DSP4_BUSY_ST
S2
0
2
DSP3_BUSY_ST
S2
0
1
DSP2_BUSY_ST
S2
0
0
DSP1_BUSY_ST
S2
0
Table 101 Interrupt 2 Control Registers
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R6784
(1A80h)
IRQ1_CTR
L
11
IM_IRQ1
0
IRQ1 Output Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
10
IRQ_POL
1
IRQ Output Polarity Select
0 = Non-inverted (Active High)
1 = Inverted (Active Low)
9
IRQ_OP_CFG
0
IRQ Output Configuration
0 = CMOS
1 = Open Drain
R6786
(1A82h)
IRQ2_CTR
L
11
IM_IRQ2
0
IRQ2 Output Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
R6816
(1AA0h)
Interrupt_R
aw_Status_
1
1
IRQ2_STS
0
IRQ2 Status
IRQ2_STS is the logical ‘OR’ of all
unmasked _EINT2 interrupts.
0 = Not asserted
1 = Asserted
0
IRQ1_STS
0
IRQ1 Status
IRQ1_STS is the logical ‘OR’ of all
unmasked _EINT1 interrupts.
0 = Not asserted
1 = Asserted
Table 102 Interrupt Control Registers



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