Data Sheet

AD7383-4/AD7384-4

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. 0 | 10 of 33

Figure 9. Pin Configuration

Table 9. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 5, 14, 16

GND

Ground Reference Point. GNDs are the ground reference points for all circuitry on the device.

2

VLOGIC

Logic Interface Supply Voltage, 1.65 V to 3.6 V. Decouple VLOGIC to GND with a 1 µF capacitor.

3

REGCAP

Decoupling Capacitor Pin for Voltage Output from Internal Regulator. Decouple REGCAP to GND with a 1 µF capacitor. The

voltage at REGCAP is 1.9 V typical.

4

VCC

Power Supply Input Voltage, 3.0 V to 3.6 V. Decouple VCC to GND using a 1µF capacitor.

6, 7

AIND−, AIND+

Analog Inputs of ADC D. The AIND− and AIND+ analog inputs form a pseudo differential pair. AIND− is typically connected to

VREF/2, and the AIND+ voltage range is from 0 V to VREF.

8, 9

AINC−, AINC+

Analog Inputs of ADC C. The AINC− and AINC+ analog inputs form a pseudo differential pair. AINC− is typically connected to

VREF/2, and the AINC+ voltage range is from 0 V to VREF.

10, 11

AINB-, AINB+

Analog Inputs of ADC B. The AINB− and AINB+ analog inputs form a pseudo differential pair. AINB− is typically connected to

VREF/2, and the AINB+ voltage range is from 0 V to VREF.

12, 13

AINA−, AINA+

Analog Inputs of ADC A. The AINA− and AINA+ analog inputs form a pseudo differential pair. AINA− is typically connected to

VREF/2, and the AINA+ voltage range is from 0 V to VREF.

15

REFCAP

Decoupling Capacitor Pin for Band Gap Reference. Decouple REFCAP to GND with a 0.1 µF capacitor. The voltage at REFCAP

is 2.5 V typical.

17

REFIO

Reference Input and Output. The on-chip reference of 2.5 V is available as an output on REFIO for external use if the device is

configured accordingly. Alternatively, an external reference of 2.5 V to 3.3 V can be input to REFIO. Set the REFSEL bit in the

CONFIGURATION1 register to 1 when using the external reference and apply the REFSEL bit after VCC and VLOGIC. Decoupling

is required on REFIO for both the internal and external reference options. Apply a 1 µF capacitor from REFIO to GND.

18

CS

Chip Select Input. Active low, logic input CS provides the dual function of initiating conversions on the AD7383-4 and the

AD7384-4 and framing the serial data transfer.

19

SDOA

Serial Data Output A. SDOA functions as a serial data output pin to access the conversion results and register contents.

20

SDOB

Serial Data Output B. SDOB functions as a serial data output pin to access the conversion results.

21

SDI

Serial Data Input. SDI provides the data written to the on-chip control registers.

22

SCLK

Serial Clock Input. SCLK is for data transfers to and from the ADC.

23

SDOC

Serial Data Output C. SDOC functions as a serial data output pin to access the conversion results and register contents.

24

SDOD/ALERT

Serial Data Output D/Alert Indication Output. SDOD/ALERT can operate as a serial data output pin or alert indication output.

SDOD functions as a serial data output pin to access the conversion results.

ALERT operates as an alert pin going low to indicate that a conversion result has exceeded a configured threshold.

Not applicable

EPAD

Exposed Pad. For correct operation of the device, the exposed pad must be connected to GND.