AD7380 datasheet(25/33 Pages) AD

25 / 33 page

Data Sheet

AD7383-4/AD7384-4

INTERFACE

analog.com

Rev. 0 | 25 of 33

READING FROM DEVICE REGISTERS

All of the registers in the device can be read over the SPI. A

followed by an additional SPI command that can be either a valid

command or a no operation (NOP) command. The format for a read

command is shown in Table 17. Bit D15 must be set to 0 to select

a read command. Bits[D14:D12] contain the register address. The

subsequent 12 bits, Bits[D11:D0], are ignored.

WRITING TO DEVICE REGISTERS

All of the read/write registers in the AD7383-4/AD7384-4 can be

written to over the SPI. The length of a SPI write access is

determined by the CRC write function. An SPI access is 16 bits,

if CRC write is disabled, and 24 bits when CRC write is enabled.

The format for a write command is shown in Table 17. Bit D15 must

be set to 1 to select a write command. Bits[D14:D12] contain the

data to be written to the selected register.

CRC

The AD7383-4/AD7384-4 have CRC checksum modes that can be

used to improve interface robustness by detecting errors in data

transmissions. The CRC feature is independently selectable for the

SPI reads and writes. For example, enable the CRC function for

SPI writes to prevent unexpected changes to the device configura-

tion, but do not enable the CRC function on SPI reads to maintain a

higher throughput rate. The CRC feature is controlled by program-

ming of the CRC_W bit and CRC_R bit in the CONFIGURATION1

CRC Read

If enabled, a CRC consisting of an 8-bit word is appended to the

conversion result or register reads. The CRC is calculated on the

conversion result for ADC A, ADC B, ADC C, and ADC D, and

is output on SDOA. A CRC is also calculated and appended to

The CRC read function can be used in 2-wire SPI mode, 1-wire SPI

mode, 4-wire SPI mode, and resolution boost mode.

Figure 39. Register Read

CRC Write

To enable the CRC write function, set CRC_W bit in the CONFIGU-

RATION1 register 1. To set the CRC_W bit to 1 to enable the CRC

feature, ensure the request frame has a valid CRC command.

After the CRC feature is enabled, all register write requests are

ignored unless they are accompanied by a valid CRC command.

A valid CRC is required to both enable and disable the CRC write

feature.

Figure 40.

CRC Polynomial

For CRC checksum calculations, the following polynomial is always

used:

x8+ x2+ x + 1

(1)

To generate the checksum, the 16-bit data conversion result of the

four channels is combined to produce a 64-bit data stream. The

8 MSBs of the 64-bit data are inverted and the data is appended

by eight bits to create a number ending in eight Logic 0s. The

polynomial is aligned such that its MSB is next to the leftmost Logic

1 of the data. An exclusive OR (XOR) function is applied to the

data to produce a new, shorter number. The polynomial is again

aligned such that its MSB is next to the leftmost Logic 1 of the new

result, and the procedure is repeated. This process repeats until the

original data is reduced to a value less than the polynomial, which

is the 8-bit checksum.

For example, the AD7383-4 polynomial is 100000111. Let the

original data of four channels be 0xAAAA, 0x5555, 0xAAAA, and

0x5555. The 8 MSBs of the data are inverted. The data is then ap-

pended to include eight 0s on right. In the final XOR operation, the

reduced data is less than the polynomial. Therefore, the remainder

is the CRC for the assumed data.

AD7380 Datasheet(PDF) 25 Page - Analog Devices

AD7380 Datasheet(HTML) 25 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33

Datasheet Download

Link URL