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Data Sheet

AD7383-4/AD7384-4

APPLICATIONS INFORMATION

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Rev. 0 | 17 of 33

Figure 28 shows an example of a typical application circuit for

the AD7383-4/AD7384-4. Decouple the VCC, VLOGIC, REGCAP, and

REFIO pins with suitable decoupling capacitors as shown in Figure

28. The exposed pad is a ground reference point for circuitry on the

devices and must be connected to the board ground.

For optimal performance, a differential RC filter must be placed on

the analog inputs. In a typical application, R = 33 Ω, C1 = 68 pF,

and C2 = 68 pF are recommended. These RC combinations must

be the same for all channels of the AD7383-4/AD7384-4.

The four pseudo differential channels of the AD7383-4/AD7384-4

accept an input voltage range from 0 V to VREF on AINA+ , AINB+,

AINC+, and AIND+ and accept VREF/2 voltage on AINA−, AINB−,

AINC− and AIND−. See Table 11 for the recommended driver amplifi-

ers that can best fit and add value to the application.

The performance of the AD7383-4/AD7384-4 is impacted by noise

on the digital interface. This impact is dependent on board layout

and design. Keep a minimal distance of the digital line to the digital

interface, or place a 100 Ω resistor in series and close to the

SDOA, SDOB, SDOC, and SDOD/ALERT pins to reduce noise from

the digital interface coupling of the AD7383-4/AD7384-4.

The AD7383-4/AD7384-4 have a buffered internal 2.5 V reference

that is accessed via the REFIO pin. The buffered internal 2.5 V

reference must use an external buffer, like the ADA4807-2, before

connecting the reference to the external circuitry. The AD7383-4/

AD7384-4 have an option to use an ultralow noise, high accuracy

voltage reference like the ADR4533 or the ADR4525 as a 3.3 V

and 2.5 V external voltage reference source to drive the AD7383-4/

AD7384-4 REFIO pin. A 1 µF reservoir capacitor is recommended

to be connected as close as possible between the REFIO pin

and the ground in a short and wide trace. When using this exter-

nal reference voltage in another circuit within the application, for

example, as a common-mode voltage for the driver amplifier, it is

recommended to use a buffer amplifier like the ADA4807-2 for a

stable reference.

POWER SUPPLY

For a typical application, the AD7383-4/AD7384-4 circuitry, shown

in Figure 28, is driven from a 5 V (V+) supply to power the system.

The 5 V (V+) is supplied from the ADP7104. The ADC driver is

supplied by a +5 V (V+) and a −2.5 V (V−) that is derived from the

inverting charge pump, the ADP5600, which converts +5 V to −5

V, and then to the ADP7182 for the low noise voltage regulator to

output −2.5 V. Two independent power supply sources are derived

from a low dropout (LDO) regulator to power the VCC supply for

the analog circuitry and the VLOGIC supply for the digital interface

of the AD7383-4/AD7384-4. A very low quiescent current LDO

regulator like the ADP166 is a suitable supply with a fixed output

voltage range from 1.2 V to 3.3 V for typical VCC and VLOGIC

levels. The VCC supply and the VLOGIC supply must be decoupled

separately with a 1 µF capacitor, placed close to the device pin

using short and wide traces to provide a low impedance path that

reduces glitches in the power supply lines. Additionally, there is an

internal LDO regulator that supplies the AD7383-4/AD7384-4. The

on-chip regulator provides a 1.9 V supply only for internal use on

the device. Decouple the AD7383-4/AD7384-4 REGCAP pin with

a 1 µF capacitor to the GND pin with short and wide traces, and

place the capacitor as close as possible to the RECGAP pin of the

device.

Power-Up

The AD7383-4/AD7384-4 are not easily damaged by power supply

sequencing. VCC and VLOGIC can be applied in any sequence.

The external reference must be applied after VCC and VLOGIC

are applied. Analog and digital signals must be applied after the

external reference is applied.

The AD7383-4/AD7384-4 require tPOWERUP from applying VCC and

VLOGIC until the ADC conversion results are stable. Figure 4 shows

the recommended signal condition during power-up with the CS pin

held high. Issue a software reset after power-up (see the Software

Reset section for details).

Table 11. Signal Chain Components

Companion Devices

Model

Description

Typical Application

ADC Driver

ADA4896-2

1 nV/√Hz, rail-to-rail output amplifier

Precision, low noise, high frequency

ADA4940-2

Ultra low power, full differential, low distortion amplifier

Precision, low density, low power

ADA4807-2

1 mA, rail-to-rail output amplifier

Precision, low power, high frequency

External Reference

ADR4525

Ultralow noise, high accuracy voltage reference

2.5 V reference voltage

ADR4533

Ultralow noise, high accuracy voltage reference

3.3 V reference voltage

Reference Buffer

ADA4807-2

1 mA, rail-to-rail output amplifier

Precision, low power, high frequency

LDO Regulator

ADP166

Very low quiescent, 150 mA LDO regulator

3.0 V to 3.6 V supply for VCC and VLOGIC

ADP7104

500 mA low noise, CMOS LDO regulator

5 V supply

ADP7182

Low noise line regulator

−2.5 V supply for ADC driver amplifier

ADP5600

Interleaved inverting charge pump with negative LDO

Voltage inverter for negative supply

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