AD7380 datasheet(24/33 Pages) AD

24 / 33 page

Data Sheet

AD7383-4/AD7384-4

INTERFACE

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Rev. 0 | 24 of 33

Serial 4-Wire Mode

Configure 4-wire mode by setting the SDO bits in the CONFIGURA-

TION2 register to 0b10. In 4-wire mode, the conversion result for

ADC A is output on the SDOA pin, ADC B on the SDOB pin, ADC C

on the SDOC pin, and ADC D on the SDOD/ALERT pin.

Serial 2-Wire Mode

Configure 2-wire mode by setting the SDO bits in the CONFIGURA-

TION2 register to 0b00. In 2-wire mode, the conversion results for

ADC A and ADC C are output on the SDOA pin. The conversion

results for ADC B and ADC D are output on the SDOB pin.

Serial 1-Wire Mode

In applications where slower throughput rates are allowed or normal

averaging oversampling is used, the serial interface can be config-

ured to operate in 1-wire mode. In 1-wire mode, the conversion

results from ADC A, ADC B, ADC C, and ADC D are output on

the SDOA pin. Additional SCLK cycles are required to propagate all

data. ADC A data is output first, followed by the ADC B, ADC C,

and ADC D conversion results.

LOW LATENCY READBACK

The interface on the AD7383-4/AD7384-4 has a one-cycle latency

as shown in Figure 36. For applications that operate at lower

throughput rates, the latency of reading the conversion result can

be reduced. When the conversion time elapses, a second CS pulse

after the initial CS pulse that initiates the conversion can read back

the conversion result. This operation is shown in Figure 38.

Figure 35. Read Conversion Results, 4-Wire Mode

Figure 36. Read Conversion Results, 2-Wire Mode

Figure 37. Reading Conversion Results, 1-Wire Mode

Figure 38. Low Throughput Low Latency

AD7380 Datasheet(PDF) 24 Page - Analog Devices