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AD7380 Datasheet(PDF) 19 Page - Analog Devices

Part # AD7380
Description  Pseudo Differential Input, Quad, 4 MSPS Simultaneous Sampling, 16-Bit/14-Bit, SAR ADC
PDF  33 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7380 Datasheet(HTML) 19 Page - Analog Devices

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Data Sheet
AD7383-4/AD7384-4
MODES OF OPERATION
analog.com
Rev. 0 | 19 of 33
The AD7383-4/AD7384-4 have several on-chip configuration regis-
ters for controlling the operational mode of the device.
OVERSAMPLING
Oversampling is a common method used in analog electronics to
improve the accuracy of the ADC result. Multiple samples of the
analog input are captured and averaged to reduce the noise com-
ponent from quantization noise and thermal noise (kTC noise) of
the ADC. The AD7383-4/AD7384-4 offer an oversampling function
on-chip with two user configurable oversampling modes: normal
averaging and rolling average.
The oversampling functionality is configured by programming the
OS_MODE bit and OSR bits in the CONFIGURATION1 register.
Normal Averaging Oversampling
Normal averaging oversampling mode is used in applications where
slower output data rates are allowed and where a higher SNR or
dynamic range is desirable. Normal averaging involves taking a
number of samples, adding them together, and dividing the result
by the number of samples taken. This result is then output from the
device. The sample data is cleared when the process completes.
Normal averaging oversampling mode is configured by setting the
OS_MODE bit to Logic 0 and having a valid nonzero value in the
OSR bits. The oversampling ratio of the digital filter is controlled
using the OSR bits (see Table 12).
Table 12 provides the oversampling bit decoding to select the
different oversample rates. The output result is decimated to 16‑bit
resolution. If required, additional resolution can be achieved by con-
figuring the resolution boost bit (RES) in the CONFIGURATION1
register. See the Resolution Boost section for further details.
The number of samples (n), defined by the OSR bits, are taken,
added together, and the result is divided by n. The initial ADC
conversion is initiated by the falling edge of CS, and the AD7383-4/
AD7384-4 control all subsequent samples in the oversampling
sequence internally. The sampling rate of the additional n samples
at the device maximum sampling rate is 3 MSPS. The data is ready
for readback on the next serial interface access. After the averaging
technique is applied, the sample data used in the calculation is
discarded. This process is repeated every time the application
needs a new conversion result and is initiated by the next falling
edge of CS.
As the output data rate is reduced by the oversampling ratio, the
SPI frequency required to transmit the data is reduced accordingly.
Figure 29. Normal Averaging Oversampling Operation
Table 12. Normal Averaging Oversampling Mode
OSR, Bits[2:0]
Oversampling Ratio
AD7383-4 SNR (dB Typical)
Data Output Rate (kSPS Maximum)
2.5 V Reference
3.3 V Reference
RES = 0
RES = 1
RES = 0
RES = 1
000
No OS
85.03
85.22
87.00
87.04
4000
001
2
87.95
88.29
89.50
90.01
1500
010
4
90.45
91.22
91.76
92.83
750
011
8
92.67
94.00
93.71
95.50
375
100
16
94.42
94.67
95.12
97.50
187.5
101
32
95.27
96.74
95.68
98.32
93.75
110
Invalid
Not applicable
Not applicable
Not applicable
Not applicable
Not applicable
111
Invalid
Not applicable
Not applicable
Not applicable
Not applicable
Not applicable



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