TMPR4925 datasheet(384/590 Pages) TOSHIBA

384 / 590 page

Chapter 11 Serial I/O Port

11-20

11.4.6

Flow Control Register 0 (SIFLCR0)

0xF314 (Ch. 0)

Flow Control Register 1 (SIFLCR1)

0xF414 (Ch. 1)

: Type

: Initial value

9876

0RCS

TES

RTSSC

RSDE TSDE

RTSTL

TBRK

R/W

: Type

0001

: Initial value

Bits

Mnemonic

Field Name

Description

31:13



Reserved



RCS

RTS Signal

Control Select

RTS Control Select (Initial value: 0, R/W)

This field sets the reception flow control using RTS output signals.

0: Disable flow control using RTS signals.

1: Enable flow control using RTS signals.

TES

CTS Signal

Control Select

CTS Control Select (Initial value: 0, R/W)

This field sets the transmission flow control using CTS input signals.

0: Disable flow control using CTS signals.

1: Enable flow control using CTS signals.



Reserved



RTSSC

RTS Software

Control

RTS Software Control (Initial value: 0, R/W)

This register is used for software control of RTS output signals.

0: Set the RTS signal to Low (can receive data).

1: Sets the RTS signal to High (transmission pause request)

RSDE

Serial Data

Reception

Enable

Receive Serial Data Enable (Initial value: 1, R/W)

This is the Serial Data Enable bit. When this bit is cleared, data reception starts

after the start bit is detected. The RTS signal will not become High even if this bit is

cleared.

0: Enable (can receive data)

1: Disable (halt reception)

TSDE

Serial Data

Transmit Enable

Transmit Serial Data Enable (Initial value: 1, R/W)

This is the Serial Data Transmission Enable bit. When this bit is cleared, data

transmission starts. When set, transmission stops after completing transmission of

the current frame.

0: Enable (can transmit data)

1: Disable (halt transmission)

6:5



Reserved



4:1

RTSTL

RTS Active

Trigger Level

RTS Trigger Level (Initial value: 0001, R/W)

The RTS hardware control assert level is set by the reception data stage count of

the Receive FIFO.

0000: Disable setting

0001: 1

1111: 15

TBRK

Break

Transmission

Break Transmit (Initial value: 0, R/W)

Transmits a break. The TXD signal is Low while TBRK is set to “1”.

0: Disable (clear break)

1: Enable (transmit break)

Figure 11.4.6 Flow Control Register

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