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TMPR4925 Datasheet(PDF) 381 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 381 Page - Toshiba Semiconductor |
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381 / 590 page ![]() Chapter 11 Serial I/O Port 11-17 Bits Mnemonic Field Name Description 6 STIS Status Change Status Change Interrupt Status (Initial value: 0, R/W0C) This bit is set when at least one of the interrupt statuses selected by the Status Change Interrupt Condition field (STIE) of the DMA/Interrupt Control Register (SIDICR) becomes “1”. 5 Reserved 4:0 RFDN Reception Data Stage Status Receive FIFO Data Number (Initial value: 00000, R) This field indicates how many stages of reception data remain in the Receive FIFO (0 – 16 stages). Figure 11.4.3 DMA/Interrupt Status Register (2/2) |
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