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TMPR4925 Datasheet(PDF) 440 Page - Toshiba Semiconductor

Part # TMPR4925
Description  64-Bit TX System RISC TX49 Family
PDF  590 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4925 Datasheet(HTML) 440 Page - Toshiba Semiconductor

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Chapter 14 AC-link Controller
14-30
Bits
Mnemonic
Field Name
Description
Enable Audio slot reception. (Initial value: 1, R/W1S)
4
AUDISLT
Enable Audio
slot reception
R
W1S
0: Indicates that audio slot reception is disabled.
1: Indicates that audio slot reception is enabled.
0: No effect
1: Enables audio slot reception.
Enable Audio LFE slot transmission. (Initial value: 1, R/W1S)
3LFESLT
Enable Audio
LFE slot
transmission
R
W1S
0: Indicates that audio LFE slot transmission is disabled.
1: Indicates that audio LFE slot transmission is enabled.
0: No effect
1: Enables audio LFE slot transmission.
Enable Audio Center slot transmission. (Initial value: 1, R/W1S)
2
CENTSLT
Enable Audio
Center slot
transmission
R
W1S
0: Indicates that audio Center slot transmission is disabled.
1: Indicates that audio Center slot transmission is enabled.
0: No effect
1: Enables audio Center slot transmission.
Enable Audio Surround L&R slot transmission. (Initial value: 1, R/W1S)
1
SURRSLT
Enable Audio
Surround L&R
slot
transmission
R
W1S
0: Indicates that audio Surround L&R slot transmission is disabled.
1: Indicates that audio Surround L&R slot transmission is enabled.
0: No effect
1: Enables audio Surround L&R slot transmission.
Enable Audio PCM L&R slot transmission. (Initial value: 1, R/W1S)
0
AUDOSLT
Enable Audio
PCM L&R slot
transmission
R
W1S
0: Indicates that audio PCM L&R Slot transmission is disabled.
1: Indicates that audio PCM L&R Slot transmission is enabled.
0: No effect
1: Enables audio PCM L&R slot transmission.
Figure 14.4.8 ACSLTEN Register (2/2)
Writing a value into this register needs several BITCLK cycles to take effect. The software must
guarantee that no write access be executed until the previous write access takes effect (completes), by
reading the ACSLTEN.WRPEND bit prior to writing this register. If it is set for a long time, the
BITCLK signal on the AC-link is probably inactive for whatever reason.



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