TMPR4925 datasheet(454/590 Pages) TOSHIBA

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Chapter 15 Interrupt Controller

15-4

15.3 Detailed Explanation

15.3.1

Interrupt Sources

The TX4925 has as interrupt sources interrupts from 21 types of on-chip peripheral circuits and 8

external interrupt signals.

Table 15.3.1 lists the interrupt sources. Signals with the lower interrupt number have the higher

priority. Refer to section “15.3.4 Interrupt Priority Assigning” for the priorities.

Table 15.3.1 Interrupt Sources and Priorities

Priority

Interrupt

Number

Interrupt Source

High

(Reserved)

TX49 Write Timeout Error (Internal)

INT[0] (External)

INT[1] (External)

INT[2] (External)

INT[3] (External)

INT[4] (External)

INT[5] (External)

INT[6] (External)

INT[7] (External)

(Reserved)

NAND Flash Controller (internal)

SIO0 (Internal)

SIO1 (Internal)

DMA0 (Internal)

DMA1 (Internal)

DMA2 (Internal)

DMA3 (Internal)

IRC (Internal)

PDMAC (Internal)

PCIC (Internal)

TMR0 (Internal)

TMR1 (Internal)

TMR2 (Internal)

SPI (Internal)

RTC (Internal)

ACLC (Internal)

ACLCPME (Internal)

CHI (Internal)

PCIERR (Internal)

PCIPME (Internal)

Low

(Reserved)

In addition to the above, the TX49/H2 core has a TX49/H2 core internal timer interrupt and two

software interrupts, but these interrupts are directly reported to the TX49/H2 core independently of this

Interrupt Controller. Please refer to the “64-Bit TX System RISC TX49/H2 Core Architecture” for more

information.

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