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TMPR4925 Datasheet(PDF) 473 Page - Toshiba Semiconductor

Part # TMPR4925
Description  64-Bit TX System RISC TX49 Family
PDF  590 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4925 Datasheet(HTML) 473 Page - Toshiba Semiconductor

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Chapter 15 Interrupt Controller
15-23
15.4.13 Interrupt Edge Detection Clear Register (IREDC)
0xF660
31
25
24
23
20
19
16
Reserved
: Type
: Initial value
15
9
8
74
30
Reserved
EDCE0
Reserved
EDCS0
R/W1C
R/W
: Type
0
0000
: Initial value
Bits
Mnemonic
Field Name
Explanation
31:9
Reserved
8EDCE0
Edge Detection
Clear Enable 0
Edge Detection Clear Enable 0 (Initial value: 0, R/W1C)
Clears edge detection of interrupts specified by the EDCS0 field.
0: Does not clear.
1: Clears.
Value always becomes “0” when this bit is read.
7:4
Reserved
3:0
EDCS0
Edge Detection
Clear Source 0
Edge Detection Clear Source 0 (Initial value: 0x0, R/W1C)
These bits specify the interrupt source to be cleared.
1111: (Reserved)
1110: (Reserved)
1101: (Reserved)
1100: (Reserved)
1011: (Reserved)
1010: (Reserved)
1001: External INT[7] interrupt
1000: External INT[6] interrupt
0111: External INT[5] interrupt
0110: External INT[4] interrupt
0101: External INT[3] interrupt
0100: External INT[2] interrupt
0011: External INT[1] interrupt
0010: External INT[0] interrupt
0001: (Reserved)
0000: (Reserved)
Figure 15.4.13 Interrupt Status Control Register



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