TMPR4925 datasheet(552/590 Pages) TOSHIBA

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Chapter 19 Real Time Clock (RTC)

19-4

19.4.1

RTC Register (High) (RTCHI)

0xF900

Reserved

: Type

: Initial value

Reserved

RTCHI

R: Type



: Initial value

Bits

Mnemonic

Field Name

Explanation

31:12



Reserved



11:0

RTCHI

RTC Register

(High)

RTC Register (High) (Initial value: undefined, R)

These bits provide the status of the bit 43 to 32 of RTC counter.

The software must read these bits twice and compare the values to ensure that the

counter is not read while the counter is counting since the CPU clock is not

synchronous with the RTC counter clock. If the two reads do not compare, the

software must read the register again to read the correct counter value.

Figure 19.4.1 RTC Register (High) (RTCHI)

19.4.2

RTC Register (Low) (RTCLO)

0xF904

RTCLO

R: Type



: Initial value

RTCLO

R: Type



: Initial value

Bits

Mnemonic

Field Name

Explanation

31:0

RTCLO

RTC Register

(Low)

RTC Register (Low) (Initial value: undefined, R)

These bits provide the status of the bit 31 to 0 of RTC counter.

The software must read these bits twice and compare the values to ensure that the

counter is not read while the counter is counting since the CPU clock is not

synchronous with the RTC counter clock. If the two reads do not compare, the

software must read the register again to read the correct counter value.

Figure 19.4.2 RTC Register (Low) (RTCLO)

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