ZL40294 datasheet(4/46 Pages) MICROCHIP

4 / 46 page

ZL40294

DS20006768B-page 4

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2023 Microchip Technology Inc.

List of Figures

FIGURE 0-1: “Functional Block Diagram” ........................................................ 1

FIGURE 1-1: “Pin Diagram.”............................................................................... 6

FIGURE 3-1: “Input Driven by a Push-Pull Differential Output.” .................. 11

FIGURE 3-2: “Input Driven By an HCSL Output.” .......................................... 11

FIGURE 3-3: “Input Driven by a Single Ended Output.”................................ 12

FIGURE 3-4: “Terminating Differential Outputs.”........................................... 12

FIGURE 3-5: “Power Supply Filtering.”........................................................... 13

FIGURE 3-6: “PWRDN# Assertion”.................................................................. 14

FIGURE 3-7: “PWRGD and VDD Relationship Diagram.”.............................. 15

FIGURE 3-8: “PWRGD Assertion.” .................................................................. 15

FIGURE 3-9: “SMBus Byte Read.”................................................................... 16

FIGURE 3-10: “SMBus Byte Write.”................................................................. 16

FIGURE 3-11: “SMBus Block Read.”............................................................... 17

FIGURE 3-12: “SMBus Block Write.”............................................................... 17

FIGURE 3-13: “Side-Band Interface Control Logic (Functional Description).”

................................................................................................................. 18

FIGURE 3-14: “Side-Band Interface Functional Timing.”.............................. 19

FIGURE 3-15: “ZL40294 Typical Phase Noise.”.............................................. 20

FIGURE 5-1: “DC Test Load (as per DB2000QL).” ......................................... 28

FIGURE 5-2: “Single-Ended Measurement Points for TRISE and TFALL.” . 29

FIGURE 5-3: “Single-Ended Measurement Points for VOVS, VUDS, VRB.” 29

FIGURE 5-4: “Differential (CK, CK#) Measurement Points.”......................... 30

FIGURE 5-5: “AC Test Load as per DB2000QL Specifications.” .................. 31

FIGURE 5-6: “SMBus Timing.”......................................................................... 33

FIGURE 5-7: “Side-Band Interface Timing.” ................................................... 34

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