ZL40294

DS20006768B-page 12

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2023 Microchip Technology Inc.

FIGURE 3-3:

INPUT DRIVEN BY A SINGLE ENDED OUTPUT.

3.2

Clock Outputs

Differential outputs have embedded termination resistors as shown in Figure 3-4. This provides significant saving rela-

tive to traditional current based HCSL outputs which require four resistors per differential pair (80 resistors for 20 out-

puts).

Embedded termination resistors in ZL40294 are matched for 85Ω differential transmission line.

FIGURE 3-4:

TERMINATING DIFFERENTIAL OUTPUTS.

3.3

Termination of unused outputs

Unused outputs should be left unconnected.

3.4

Power Supply Filtering

Each power pin (VDDA and VDD) should be decoupled with 0.1 µF capacitor with minimum equivalent series resistance

(ESR) and minimum series inductance (ESL). For example, 0402 X5R Ceramic Capacitors with 6.3V minimum rating

could be used. These capacitors should be placed as close as possible to the power pins. To reduce the power noise

from adjacent digital components on the board each power supply could be further insulated with low DC resistance

ferrite bead with two capacitors. The ferrite bead will also insulate adjacent component from the noise generated from

the device. Figure 3-5 shows recommended decoupling.