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ZL40294 Datasheet(PDF) 8 Page - Microchip Technology

Part # ZL40294
Description  20-Output DB2000QL Buffer with Ultra-Low Additive Jitter
PDF  46 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

ZL40294 Datasheet(HTML) 8 Page - Microchip Technology

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ZL40294
DS20006768B-page 8
2023 Microchip Technology Inc.
A6
CK14#
O
Ultra-Low Additive Jitter Differential Outputs 0 to 19
Output frequency range 0 MHz to 250 MHz
A5
CK15
A4
CK15#
A3
CK16
A2
CK16#
A1
CK17
B1
CK17#
C1
CK18
D1
CK18#
E1
CK19
F1
CK19#
Hardware Control
K11
vOE7#
IPD
Output Enable. Logic level on these pins enables/disables
corresponding output:
OE_n# = CKn/n#
0 = Active
1 = Low/Low both pulled low by 42.5Ω
H11
vOE8#
E12
vOE9#
C11
vOE11#
B10
vOE12#
L8
vOE5#/vDATA
IPD
Output Enable/Data Input for Side Band Interface.
When Side-Band interface is disabled (pin SBEN pulled low)
this pin is Output Enable and the description is the same as
for pin K11 above.
When Side-Band interface is enabled (pin SBEN pulled high)
this pin is Data Input for Side-Band interface.
L10
vOE6#/vCLK
IPD
Output Enable/Clock Input for Side Band Interface.
When Side-Band Interface is disabled (pin SBEN pulled low)
this pin is Output Enable and the description is the same as
for pin K11 above.
When Side-Band interface is enabled (pin SBEN pulled high)
this pin is Clock Input for Side-Band interface.
E11
vOE10#/
vSHFT_LD#
IPD
Output Enable/Shift Load for Side Band Interface.
When Side-Band interface is disabled (pin SBEN pulled low)
this pin is Output Enable and the description is the same as
for pin K11 above.
When Side-Band interface is enabled (pin SBEN pulled high)
this pin is Shift Load Input for Side-Band interface. A falling
edge on this pin transfers the sideband shift register content
to the output register.
E2
vSBEN
IPD
Side-Band Interface Enable.
When this pin is low, the Side-Band interface is disabled and
OE pins and OE Register bits (via SMBus) can be used to
enable/disable outputs.
When this pin is high, the Side-Band interface can be used to
enable/disable outputs, and OE pins and OE Register bits (via
SMBus) are disabled.
M6
PWRGD/
PWRDN#
I
Power Up/Power Down.
SMBus Control
L5
SMBCLK
I
SMBus Client Clock Input.
L4
SMBDAT
I/O
Input/Open Drain SMBus Data.
TABLE 2-1:
PIN DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
Input/Output
Description



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