80221 datasheet(18/91 Pages) LSI

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80220/80221

MD400159/E

3.8.3 Transmit Level Adjust

The transmit output current level is derived from an internal

reference voltage and the external resistor on REXT pin.

The transmit level can be adjusted with either (1) the

external resistor on the REXT pin, or (2) the four transmit

level adjust bits in the MI serial port Configuration 1 register

as shown in Table 3. The adjustment range is approxi-

mately -14% to +16% in 2% steps.

Table 3. Transmit Level Adjust

TLVL[3:0]

Gain

0000

1.16

0001

1.14

0010

1.12

0011

1.10

0100

1.08

0101

1.06

0110

1.04

0111

1.02

1000

1.00

1001

0.98

1010

0.96

1011

0.94

1100

0.92

1101

0.90

1110

0.88

1111

0.86

3.8.4 Transmit Rise And Fall Time Adjust

The transmit output rise and fall time can be adjusted with

either (1) the two pins TRFADJ[1:0], or (2) the two transmit

rise/fall time adjust bits in the MI serial port Configuration

1. The adjustment range is -0.25 nS to +0.5 nS in 0.25 nS

steps. When the TRFADJ[1:0] pins are set to 1 and 0,

respectively, the rise and fall times are set with the register

bits (with 0 ns as the default). When TRFADJ[1:0] pin are

set to anything other than 10, then the pins control the

transmit rise and fall time as shown in the Pin Description

and the TRFADJ[1:0] bits are disabled.

3.8.5 STP (150 Ohm) Cable Mode

The transmitter can be configured to drive 150 Ohm

shielded twisted pair cable.

The STP mode can be

selected by appropriately setting the cable type select bit

in the MI serial port Configuration 1 register. When STP

mode is enabled, the output current is automatically ad-

justed to comply with IEEE 802.3 levels.

3.8.6 Transmit Activity Indication

Transmit activity can be programmed to appear on some

of the PLED[5:0] pins by appropriately setting the pro-

grammable LED output select bits in the MI serial port LED

Configuration 2 register as described in Table 5. When

one or more of the PLED[5:0] pins is programmed to be an

activity or transmit activity detect output, that pin is as-

serted low for 100 mS every time a transmit packet occurs.

The PLED[5:0] output is open drain with pullup resistor

and can drive an LED from VCC or can drive another digital

input.

3.8.7 Transmit Disable

The TP transmitter can be disabled by setting the transmit

disable bit in the MI serial port Configuration 1 register.

When the transmit disable bit is set, the TP transmitter is

forced into the idle state, no data is transmitted, no link

pulses are transmitted, and internal loopback is disabled.

3.8.8 Transmit Powerdown

The TP transmitter can be powered down by setting the

transmit powerdown bit in the MI serial port Configuration

1 register. When the transmit powerdown bit is set, the TP

transmitter is powered down, the TP transmit outputs are

high impedance, and the rest of the 80220/80221 operates

normally.

3.9 TWISTED PAIR RECEIVER

3.9.1 Receiver - 100 Mbps

The TP receiver detects input signals from the twisted pair

input and convert it to a digital data bit stream ready for

clock and data recovery. The receiver can reliably detect

data from a 100Base-TX compliant transmitter that has

been passed through 0-100 meters of 100 Ohm category

5 UTP or 150 Ohm STP.

The 100 Mbps receiver consists of an adaptive equalizer,

baseline wander correction circuit, comparators, and MLT-

3 decoder. The TP inputs first go to an adaptive equalizer.

The adaptive equalizer compensates for the low pass

characteristic of the cable, and it has the ability to adapt

and compensate for 0-100 meters of category 5,100 Ohm

UTP or 150 Ohm STP twisted pair cable. The baseline

wander correction circuit restores the DC component of

the input waveform that was removed by external trans-

formers. The comparators convert the equalized signal

back to digital levels and are used to qualify the data with

the squelch circuit. The MLT-3 decoder takes the three

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