80221 datasheet(34/91 Pages) LSI

34 / 91 page

80220/80221

MD400159/E

Table 10. MI Register 0 (Control) Structure And Bit Definition

0.15

0.14

0.13

0.12

0.11

0.10

0.9

0.8

RST

LPBK

SPEED

ANEG_EN

PDN

MII_DIS

ANEG_RST

DPLX

R/WSC

R/W

R/WSC

R/W

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

COLTST

00000

R/W

Bit

Symbol

Name

Definition

R/W

Def.

0.15

RST

Reset

1 = Reset, Bit Self Clearing After Reset Completed

R/W

0 = Normal

0.14

LPBK

Loopback Enable

1 = Loopback Mode Enabled

R/W

0 = Normal

0.13

SPEED

Speed Select

1 = 100 Mbps Selected (100BaseTX)

R/W

0 = 10 Mbps Selected (10BaseT)

0.12

ANEG_EN

AutoNegotiation

1 = AutoNegotiation Enabled

R/W

Enable

0 = Normal

0.11

PDN

Powerdown Enable

1 = Powerdown

R/W

0 = Normal

0.10

MII_DIS

MII Interface

1 = MII Interface Disabled

R/W

Disable

0 = Normal

0.9

ANEG_RST

AutoNegotiation

1 = Restart AutoNegotiation Process, Bit Self

R/W

Reset

Clearing After Reset Completed

0 = Normal

0.8

DPLX

Duplex Mode

1 = Full Duplex

R/W

Select

0 = Half Duplex

0.7

COLTST

Collision Test

1 = Collision Test Enabled

R/W

Enable

0 = Normal

0.6

Reserved

R/W

thru

0.0

x.15 Bit Is Shifted First

Note 1: if MDA[4:0] not = 11111, then the MII_DIS default value is changed to 0

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