TAS5028 datasheet(35/84 Pages) TI

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TAS5028 Controls and Status

SLES112 — June 2004

TAS5028

After the initialization time, the TAS5028 starts the transition to the operational state with the Master volume

set at mute.

Since the TAS5028 has an external crystal time base, following the release of RESET, the TAS5028 sets the

MCLK and data rates and perform the initialization sequences. The PWM outputs are held at a mute state until

the master volume is set to a value other than mute via I2C.

2.2.2 Power Down (PDN)

TheTAS5028 can be placed into the power down mode by holding the PDN terminal low. When power down

mode is entered, both the PLL and the oscillator are shut down. Volume is immediately set to full attenuation

(there is no ramp down). This control uses the PWM mute sequence that provides a low click and pop transition

to the hard mute state (M). A detailed description of the PWM mute sequence is contained in the PWM section.

Power down is an asynchronous operation that does not require MCLK to go into the power down state. To

initiate the power-up sequence requires MCLK to be operational and the TAS5028 to receive 5 MCLKs prior

to the release of PDN.

As long as the PDN terminal is held low the device is in the power down state with the PWM outputs in a hard

mute (M) state. During power down, all I2C and serial data bus operations are ignored. Table 2 - 3 shows the

device output signals while PDN is active.

Table 2 - 3. Device Outputs During Power Down

SIGNAL

SIGNAL STATE

Valid

Low

PWM P-outputs

M-state = low

PWM M-outputs

M-state = low

SDA

Signal input

Following the application of PDN, the TAS5028 does not perform a quiet shutdown to prevent clicks and pops

produced during the application (the leading edge) of this command. The application of PDN immediately

performs a PWM stop. A quiet stop sequence can be performed by first applying MUTE before PDN.

When PDN is released, the system goes to the end state specified by MUTE and BKND_ERR pins and the

I2C register settings.

The crystal time base allows the TAS5028 to determine the CLK rates. Once these rates are determined, the

TAS5028 unmutes the audio.

2.2.3 Backend Error (BKND_ERR)

Backend error is used to provide error management for backend error conditions. Backend error is a level

sensitive signal. Backend error can be initiated by bringing the BKND_ERR terminal low for a minimum 5

MCLK cycles. When BKND_ERR is brought low, the PWM sets either six or eight channels into the PWM

backend error state. This state is described in the PWM section. Once the backend error sequence is initiated,

a delay of 5 ms is performed before the system starts the output re - initialization sequence. After the

initialization time, the TAS5028 begins normal operation. Backend error does not affect other PWM modulator

operations

The number of channels that are affected by the BKND_ERR signal is dependent upon the 6-channel

configuration signal. If the I2C setting 6-channel configuration is false, the TAS5028 places all eight PWM

outputs in the PWM backend error state, while not affecting any other internal settings or operations. If the

I2C setting six configuration is true, the TAS5028 brings the PWM outputs 1 - 6 to a backend error state, while

not affecting any other internal settings or operations. Table 2 - 4 shows the device output signal states during

backend error.

TAS5028 Datasheet(PDF) 35 Page - Texas Instruments

TAS5028 Datasheet(HTML) 35 Page - Texas Instruments

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